The global real-time counter peripheral (GRTC) is an ultra-low power shared system timer. GRTC implements a high-resolution system timer that is available in all power modes, including System OFF.
The system timer has a 1 μs resolution and is 52 bits wide. This provides a run time of 142 years after initial power-on until the counter wraps around. It uses the 16 MHz clock when the high-speed clock is active, but automatically switches to 32.768 kHz in the other power modes. It will continue to be updated in all power modes. Due to the combination of clock sources, it has a 1 μs resolution and an accuracy equal to the 32.768 kHz clock.
The main features of GRTC are the following:
- System timer – SYSCOUNTER
- 1 µs resolution
- Multiple compare/capture channels on SYSCOUNTER
- PPI connection
- Periodic interval generation for one compare event
- Wake up from System OFF mode
- Supports split security for GRTC features
- Pulse Width Modulation (PWM)
- Single channel PWM
- Operates in System OFF mode
- Clock output on pin
- LFCLK
- Configurable divided fast clock output
The system timer is a high resolution timer which can be accessed by all processors in the system. It allows the same system counter to be shared among all users. GRTC can operate in System OFF mode.
All GRTC registers are reset during wakeup from System OFF mode. However, the SYSCOUNTER[m].SYSCOUNTERL and SYSCOUNTER[m].SYSCOUNTERH registers are restored automatically on wakeup from System OFF mode and after soft reset.