SPIS implements EasyDMA for accessing RAM without CPU involvement.
SPIS implements the EasyDMA channels found in the following table.
| Channel | Type | Register Cluster |
|---|---|---|
| TXD | READER | TXD |
| RXD | WRITER | RXD |
For detailed information regarding the use of EasyDMA, see EasyDMA.
If RXD.MAXCNT is greater than TXD.MAXCNT, the remaining transmitted bytes will contain the value defined in the ORC register.
The END event indicates that EasyDMA is finished accessing the RAM buffer.