NORDIC.VPRNORDICCTRL

Address offset: 0x7C0

Nordic Core Control


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID				D	D	D	D	D	D	D	D	D	D	D	D	D	D	D	D									C	B						A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	RW	ENABLERTPERIPH										Control bit to enable Real-Time Peripherals When this bit is cleared, it will override the APB read value of the INTEN register to 0.
			Disabled	0
			Enabled	1
B	RW	CNTIRQENABLE										Enables the generation of IRQ number COUNTER_IRQ_NUM
			Disabled	0x0
			Enabled	0x1
C	RW	VPRBUSPRI										Arbitration priority on bus Setting high priority will give VPR maximum priority and can cause starvation for other bus masters trying to access the same memory. It should only be used in limited sections of code and care must be taken to avoid continuous memory accesses to ensure other bus masters can perform interleaved accesses.
			LowPriority	0x0								Low priority for VPR RAM transactions on bus
			HighPriority	0x1								High priority for VPR RAM transactions on bus
D	W	NORDICKEY										Used in order to protect the write to this register
			Enabled	0x507D								Write enabled