PHY.CONFIG

Address offset: 0x440

USB PHY parameter overrides


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID					L	K	K	J	J	I	I	H	H	H	H	G	G	G	G	F	F	E	E	D	D	D	C	C	C	B	B	B	B	A	A
Reset 0x5533D6F0				0	1	0	1	0	1	0	1	0	0	1	1	0	0	1	1	1	1	0	1	0	1	1	0	1	1	1	1	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	RW	PLLITUNE		[0x0..0x3]								PLL Integral Path Tune
B	RW	PLLPTUNE		[0x0..0xf]								PLL Proportional Path Tune
C	RW	COMPDISTUNE0		[0x0..0x7]								Disconnect Threshold Adjustment
D	RW	SQRXTUNE0		[0x0..0x3]								Squelch Threshold Adjustment
E	RW	VDATREFTUNE0		[0x0..0x3]								Data Detect Voltage Adjustment
F	RW	TXHSXVTUNE0		[0x0..0x2]								Transmitter High-Speed Crossover Adjustment
G	RW	TXFSLSTUNE0		[0x0..0x7]								FS/LS Source Impedance Adjustment
H	RW	TXVREFTUNE0		[0x0..0x7]								HS DC Voltage Level Adjustment
I	RW	TXRISETUNE0		[0x0..0x2]								HS Transmitter Rise/Fall Time Adjustment
J	RW	TXRESTUNE0		[0x0..0x2]								USB Source Impedance Adjustment
K	RW	TXPREEMPAMPTUNE0		[0x0..0x2]								HS Transmitter Pre-Emphasis Current Control
L	RW	TXPREEMPPULSETUNE0		[0x0..0x1]								HS Transmitter Pre-Emphasis Duration Control