Instances
| Instance | Domain | Base address | TrustZone | Split access | Description | ||
|---|---|---|---|---|---|---|---|
| Map | Att | DMA | |||||
|
CTRLAP : S |
GLOBAL |
0x50052000 |
US | S | NSA | No |
Control access port CPU side |
Register overview
| Register | Offset | TZ | Description |
|---|---|---|---|
| EVENTS_RXREADY | 0x100 |
RXSTATUS is changed to DataPending. |
|
| EVENTS_TXDONE | 0x104 |
TXSTATUS is changed to NoDataPending. |
|
| INTEN | 0x300 |
Enable or disable interrupt |
|
| INTENSET | 0x304 |
Enable interrupt |
|
| INTENCLR | 0x308 |
Disable interrupt |
|
| INTPEND | 0x30C |
Pending interrupts |
|
| MAILBOX.RXDATA | 0x400 |
Data sent from the debugger to the CPU. |
|
| MAILBOX.RXSTATUS | 0x404 |
Status to indicate if data sent from the debugger to the CPU has been read. |
|
| MAILBOX.TXDATA | 0x480 |
Data sent from the CPU to the debugger. |
|
| MAILBOX.TXSTATUS | 0x484 |
Status to indicate if data sent from the CPU to the debugger has been read. |
|
| ERASEPROTECT.LOCK | 0x500 |
This register locks the ERASEPROTECT.DISABLE register from being written until next reset. |
|
| ERASEPROTECT.DISABLE | 0x504 |
This register disables the ERASEPROTECT register and performs an ERASEALL operation. |
|
| RESET | 0x520 |
System reset request. |