CPURUN

nRF54LM20A | nRF54LM20B Datasheet

Address offset: 0x800

State of the CPU after a core reset

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW

EN

Controls CPU running state after a core reset.

Stopped

0

CPU stopped. If this is the CPU state after a core reset, setting this bit will change the CPU state to CPU running.

Running

1

CPU running. If this is the CPU state after a core reset, clearing this bit will change the CPU state to CPU stopped after a core reset.