HC[n].CHAR

nRF54LM20A | nRF54LM20B Datasheet

Address offset: 0x500 + (n × 0x18)

Host Channel Characteristics Register 0

This register contains the characteristics of the Host Channel.

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID J I H G G G G G G G F F E E D C B B B B A A A A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW

MPS

Maximum Packet Size (MPS)

Indicates the maximum packet size of the associated endpoint.

B

RW

EPNUM

Endpoint Number (EPNum)

Indicates the endpoint number on the device serving as the data source or sink.

ENDPT0

0

End point 0

ENDPT1

1

End point 1

ENDPT2

2

End point 2

ENDPT3

3

End point 3

ENDPT4

4

End point 4

ENDPT5

5

End point 5

ENDPT6

6

End point 6

ENDPT7

7

End point 7

ENDPT8

8

End point 8

ENDPT9

9

End point 9

ENDPT10

10

End point 10

ENDPT11

11

End point 11

ENDPT12

12

End point 12

ENDPT13

13

End point 13

ENDPT14

14

End point 14

ENDPT15

15

End point 15

C

RW

EPDIR

Endpoint Direction (EPDir)

Indicates whether the transaction is IN or OUT.

OUT

0

OUT Direction

IN

1

IN Direction

D

RW

LSPDDEV

Low-Speed Device (LSpdDev)

This field is Set by the application to indicate that this channel is communicating to a low-speed device. The application must program this bit when a low speed device is connected to the host through an FS HUB. The DWC_otg Host core uses this field to drive the XCVR_SELECT signal to 2'b11 while communicating to the LS Device through the FS hub. Note: In a peer to peer setup, the DWC_otg Host core ignores this bit even if it is set by the application software.

DISABLED

0

Not Communicating with low speed device

ENABLED

1

Communicating with low speed device

E

RW

EPTYPE

Endpoint Type (EPType)

Indicates the transfer type selected.

CTRL

0

Control

ISOC

1

Isochronous

BULK

2

Bulk

INTERR

3

Interrupt

F

RW

EC

Multi Count (MC) / Error Count (EC)

When the Split Enable bit of the Host Channel-n Split Control register (HCSPLTn.SpltEna) is reset (1'b0), this field indicates to the host the number of transactions that must be executed per microframe for this periodic endpoint. For non periodic transfers, this field is used only in DMA mode, and specifies the number packets to be fetched for this channel before the internal DMA engine changes arbitration. When HCSPLTn.SpltEna is Set (1'b1), this field indicates the number of immediate retries to be performed for a periodic split transactions on transaction errors. This field must be Set to at least 2'b01.

ECRSVD0

0

Reserved. This field yields undefined result

TRANSONE

1

1 transaction

TRANSTWO

2

2 transactions to be issued for this endpoint per microframe

TRANSTHREE

3

3 transactions to be issued for this endpoint per microframe

G

RW

DEVADDR

Device Address (DevAddr)

This field selects the specific device serving as the data source or sink.

H

RW

ODDFRM

Odd Frame (OddFrm)

This field is set (reset) by the application to indicate that the OTG host must perform a transfer in an odd (micro)Frame. This field is applicable for only periodic (isochronous and interrupt) transactions.

EFRAME

0

Even Frame Transfer

OFRAME

1

Odd Frame Transfer

I

RW

CHDIS

Channel Disable (ChDis)

The application sets this bit to stop transmitting/receiving data on a channel, even before the transfer for that channel is complete. The application must wait for the Channel Disabled interrupt before treating the channel as disabled.

INACTIVE

0

Transmit/Recieve normal

ACTIVE

1

Stop transmitting/receiving data on channel

J

RW

CHENA

Channel Enable (ChEna)

When Scatter/Gather mode is enabled When Scatter/Gather mode is disabled This field is set by the application and cleared by the OTG host.

DISABLED

0

If Scatter/Gather mode is enabled, indicates that the descriptor structure is not yet ready. If Scatter/Gather mode is disabled, indicates that the channel is disabled.

ENABLED

1

If Scatter/Gather mode is enabled, indicates that the descriptor structure and data buffer with data is set up and this channel can access the descriptor. If Scatter/Gather mode is disabled, indicates that the channel is enabled.