Memory

The application core contains flash memory and RAM that can be used for code and data storage.

The following figure shows how the CPU, network core, and peripherals with EasyDMA can access RAM via the AHB multilayer interconnect. The domain configuration (DCNF) registers can block access from external DMA masters, see DCNF — Domain configuration.

Figure 1. Memory layout

Peripheral instantiation

The following table describes the abbreviations used in the Instance, Secure mapping, and DMA security columns of the instantiation table.

Table 1. Instantiation table abbreviations
Abbreviation	Description
NS	Trustzone/security attribute is Non-secure - The peripheral is accessible as a Non-secure peripheral.
S	Trustzone/security attribute is Secure - The peripheral is accessible as a Secure peripheral.
US	Trustzone Map is user selectable - The Trustzone/security attribute of the peripheral can be configured using SPU — System protection unit.
HF	Trustzone Map is hardware fixed - The Trustzone/security attribute of the peripheral cannot be changed.
NA	Not Applicable - Peripheral has no DMA capability.
NSA	NoSeparateAttribute - Peripheral with DMA and DMA transfer has the same security attribute as assigned to the peripheral.
SA	SeparateAttribute - Peripheral with DMA and DMA transfers can have a different security attribute than the one assigned to the peripheral.

The Secure mapping column in the following table defines configuration capabilities for the Arm® TrustZone® for Armv8-M secure attribute. The DMA security column describes the DMA capabilities of the peripheral.

Instantiation

Table 2. Instantiation table
ID	Base address	Instance	TrustZone			Split access	Description
ID	Base address	Instance	Map	Att	DMA	Split access	Description
0	0x50000000 0x40000000	DCNF : S DCNF : NS	US	S	NA	No	Domain configuration
0	0x50000000 0x40000000	FPU : S FPU : NS	US	S	NA	No	Floating Point unit interrupt control
1	0x50001000	CACHE	HF	S	NA	No	Cache
3	0x50003000	SPU	HF	S	NA	No	System protection unit
4	0x50004000 0x40004000	OSCILLATORS : S OSCILLATORS : NS	US	S	NA	No	Oscillator configuration
4	0x50004000 0x40004000	REGULATORS : S REGULATORS : NS	US	S	NA	No	Regulator configuration
5	0x50005000 0x40005000	CLOCK : S CLOCK : NS	US	S	NA	No	Clock control
5	0x50005000 0x40005000	POWER : S POWER : NS	US	S	NA	No	Power control
5	0x50005000 0x40005000	RESET : S RESET : NS	US	S	NA	No	Reset control and status
6	0x50006000 0x40006000	CTRLAP : S CTRLAP : NS	US	S	NSA	No	Control access port CPU side
8	0x50008000 0x40008000	SPIM0 : S SPIM0 : NS	US	S	SA	No	SPI master 0
8	0x50008000 0x40008000	SPIS0 : S SPIS0 : NS	US	S	SA	No	SPI slave 0
8	0x50008000 0x40008000	TWIM0 : S TWIM0 : NS	US	S	SA	No	Two-wire interface master 0
8	0x50008000 0x40008000	TWIS0 : S TWIS0 : NS	US	S	SA	No	Two-wire interface slave 0
8	0x50008000 0x40008000	UARTE0 : S UARTE0 : NS	US	S	SA	No	Universal asynchronous receiver/transmitter with EasyDMA 0
9	0x50009000 0x40009000	SPIM1 : S SPIM1 : NS	US	S	SA	No	SPI master 1
9	0x50009000 0x40009000	SPIS1 : S SPIS1 : NS	US	S	SA	No	SPI slave 1
9	0x50009000 0x40009000	TWIM1 : S TWIM1 : NS	US	S	SA	No	Two-wire interface master 1
9	0x50009000 0x40009000	TWIS1 : S TWIS1 : NS	US	S	SA	No	Two-wire interface slave 1
9	0x50009000 0x40009000	UARTE1 : S UARTE1 : NS	US	S	SA	No	Universal asynchronous receiver/transmitter with EasyDMA 1
10	0x5000A000 0x4000A000	SPIM4 : S SPIM4 : NS	US	S	SA	No	SPI master 4 (high-speed)
11	0x5000B000 0x4000B000	SPIM2 : S SPIM2 : NS	US	S	SA	No	SPI master 2
11	0x5000B000 0x4000B000	SPIS2 : S SPIS2 : NS	US	S	SA	No	SPI slave 2
11	0x5000B000 0x4000B000	TWIM2 : S TWIM2 : NS	US	S	SA	No	Two-wire interface master 2
11	0x5000B000 0x4000B000	TWIS2 : S TWIS2 : NS	US	S	SA	No	Two-wire interface slave 2
11	0x5000B000 0x4000B000	UARTE2 : S UARTE2 : NS	US	S	SA	No	Universal asynchronous receiver/transmitter with EasyDMA 2
12	0x5000C000 0x4000C000	SPIM3 : S SPIM3 : NS	US	S	SA	No	SPI master 3
12	0x5000C000 0x4000C000	SPIS3 : S SPIS3 : NS	US	S	SA	No	SPI slave 3
12	0x5000C000 0x4000C000	TWIM3 : S TWIM3 : NS	US	S	SA	No	Two-wire interface master 3
12	0x5000C000 0x4000C000	TWIS3 : S TWIS3 : NS	US	S	SA	No	Two-wire interface slave 3
12	0x5000C000 0x4000C000	UARTE3 : S UARTE3 : NS	US	S	SA	No	Universal asynchronous receiver/transmitter with EasyDMA 3
13	0x5000D000	GPIOTE0	HF	S	NA	No	GPIO tasks and events
14	0x5000E000 0x4000E000	SAADC : S SAADC : NS	US	S	SA	No	Successive approximation analog-to-digital converter
15	0x5000F000 0x4000F000	TIMER0 : S TIMER0 : NS	US	S	NA	No	Timer 0
16	0x50010000 0x40010000	TIMER1 : S TIMER1 : NS	US	S	NA	No	Timer 1
17	0x50011000 0x40011000	TIMER2 : S TIMER2 : NS	US	S	NA	No	Timer 2
20	0x50014000 0x40014000	RTC0 : S RTC0 : NS	US	S	NA	No	Real time counter 0
21	0x50015000 0x40015000	RTC1 : S RTC1 : NS	US	S	NA	No	Real time counter 1
23	0x50017000 0x40017000	DPPIC : S DPPIC : NS	US	S	NA	Yes	DPPI controller
24	0x50018000 0x40018000	WDT0 : S WDT0 : NS	US	S	NA	No	Watchdog timer 0
25	0x50019000 0x40019000	WDT1 : S WDT1 : NS	US	S	NA	No	Watchdog timer 1
26	0x5001A000 0x4001A000	COMP : S COMP : NS	US	S	NA	No	Comparator
26	0x5001A000 0x4001A000	LPCOMP : S LPCOMP : NS	US	S	NA	No	Low-power comparator
27	0x5001B000 0x4001B000	EGU0 : S EGU0 : NS	US	S	NA	No	Event generator unit 0
28	0x5001C000 0x4001C000	EGU1 : S EGU1 : NS	US	S	NA	No	Event generator unit 1
29	0x5001D000 0x4001D000	EGU2 : S EGU2 : NS	US	S	NA	No	Event generator unit 2
30	0x5001E000 0x4001E000	EGU3 : S EGU3 : NS	US	S	NA	No	Event generator unit 3
31	0x5001F000 0x4001F000	EGU4 : S EGU4 : NS	US	S	NA	No	Event generator unit 4
32	0x50020000 0x40020000	EGU5 : S EGU5 : NS	US	S	NA	No	Event generator unit 5
33	0x50021000 0x40021000	PWM0 : S PWM0 : NS	US	S	SA	No	Pulse width modulation unit 0
34	0x50022000 0x40022000	PWM1 : S PWM1 : NS	US	S	SA	No	Pulse width modulation unit 1
35	0x50023000 0x40023000	PWM2 : S PWM2 : NS	US	S	SA	No	Pulse width modulation unit 2
36	0x50024000 0x40024000	PWM3 : S PWM3 : NS	US	S	SA	No	Pulse width modulation unit 3
38	0x50026000 0x40026000	PDM0 : S PDM0 : NS	US	S	SA	No	Pulse density modulation (digital microphone) interface
40	0x50028000 0x40028000	I2S0 : S I2S0 : NS	US	S	SA	No	Inter-IC sound interface
42	0x5002A000 0x4002A000	IPC : S IPC : NS	US	S	NA	No	Interprocessor communication
43	0x5002B000 0x4002B000	QSPI : S QSPI : NS	US	S	SA	No	External memory (quad serial peripheral) interface
45	0x5002D000 0x4002D000	NFCT : S NFCT : NS	US	S	SA	No	Near field communication tag
47	0x4002F000	GPIOTE1	HF	NS	NA	No	GPIO tasks and events
48	0x50030000 0x40030000	MUTEX : S MUTEX : NS	US	S	NA	No	Mutual exclusive hardware support
51	0x50033000 0x40033000	QDEC0 : S QDEC0 : NS	US	S	NA	No	Quadrature decoder 0
52	0x50034000 0x40034000	QDEC1 : S QDEC1 : NS	US	S	NA	No	Quadrature decoder 1
54	0x50036000 0x40036000	USBD : S USBD : NS	US	S	SA	No	Universal serial bus device
55	0x50037000 0x40037000	USBREGULATOR : S USBREGULATOR : NS	US	S	NA	No	USB regulator control
57	0x50039000 0x40039000	KMU : S KMU : NS	HF	S	NA	Yes	Key management unit
57	0x50039000 0x40039000	NVMC : S NVMC : NS	US	S	NA	Yes	Non-volatile memory controller
66	0x50842500 0x40842500	P0 : S P0 : NS	US	S	NA	Yes	General purpose input and output, port 0
66	0x50842800 0x40842800	P1 : S P1 : NS	US	S	NA	Yes	General purpose input and output, port 1
68	0x50844000	CRYPTOCELL	HF	S	NSA	No	CRYPTOCELL 312 security subsystem
69	0x50845000	CC_AES	HF	S	NSA	No	CRYPTOCELL AES engine
69	0x50845000	CC_AHB	HF	S	NSA	No	CRYPTOCELL AHB interface
69	0x50845000	CC_AO	HF	S	NSA	No	CRYPTOCELL AO block
69	0x50845000	CC_CHACHA	HF	S	NSA	No	CRYPTOCELL CHACHA engine
69	0x50845000	CC_CTL	HF	S	NSA	No	CRYPTOCELL CTL interface
69	0x50845000	CC_DIN	HF	S	NSA	No	CRYPTOCELL DIN DMA engine
69	0x50845000	CC_DOUT	HF	S	NSA	No	CRYPTOCELL DOUT DMA engine
69	0x50845000	CC_GHASH	HF	S	NSA	No	CRYPTOCELL GHASH engine
69	0x50845000	CC_HASH	HF	S	NSA	No	CRYPTOCELL HASH engine
69	0x50845000	CC_HOST_RGF	HF	S	NSA	No	CRYPTOCELL HOST register interface
69	0x50845000	CC_MISC	HF	S	NSA	No	CRYPTOCELL MISC interface
69	0x50845000	CC_PKA	HF	S	NSA	No	CRYPTOCELL PKA engine
69	0x50845000	CC_RNG	HF	S	NSA	No	CRYPTOCELL RNG engine
69	0x50845000	CC_RNG_SRAM	HF	S	NSA	No	CRYPTOCELL RNG SRAM interface
129	0x50081000 0x40081000	VMC : S VMC : NS	US	S	NA	No	Volatile memory controller
N/A	0x00F00000	CACHEDATA	HF	S	NA	No	Cache data
N/A	0x00F08000	CACHEINFO	HF	S	NA	No	Cache info
N/A	0x00FF0000	FICR	HF	S	NA	No	Factory information configuration registers
N/A	0x00FF8000	UICR	HF	S	NA	No	User information configuration registers
N/A	0xE0042000	CTI	HF	S	NA	No	Cross-trigger interface
N/A	0xE0080000	TAD	HF	S	NA	No	Trace and debug control