The general purpose input/output pins (GPIOs) are grouped as one or more ports, with each port having up to 32 GPIOs.

The number of ports and GPIOs per port varies with product variant and package. Refer to Registers and Pin assignments for more information about the number of GPIOs that are supported.

GPIO has the following user-configurable features:

  • Up to 32 GPIO pins per GPIO port
  • Output drive strength
  • Internal pull-up and pull-down resistors
  • Wake-up from high or low level triggers on all pins
  • Trigger interrupt on state changes on any pin
  • All pins can be used by the PPI task/event system
  • One or more GPIO outputs can be controlled through the PPI and GPIOTE channels
  • Any pin can be mapped to a peripheral for layout flexibility
  • GPIO state changes captured on the SENSE signal can be stored by the LATCH register

The GPIO port peripheral implements up to 32 pins, PIN0 through PIN31. Each of these pins can be individually configured in the PIN_CNF[n] registers (n=0..31).

The following parameters can be configured through these registers:

  • Direction
  • Drive strength
  • Enabling of pull-up and pull-down resistors
  • Pin sensing
  • Input buffer disconnect
  • Analog input (for selected pins)

The PIN_CNF registers are retained registers. See POWER — Power supply for more information about retained registers.

Pin configuration

Pins can be individually configured through the SENSE field in the PIN_CNF[n] register to detect either a high or low level input.

When the correct level is detected on a configured pin, the sense mechanism will set the DETECT signal high. Each pin has a separate DETECT signal. Default behavior, defined by the DETECTMODE register, combines all DETECT signals from the pins in the GPIO port into one common DETECT signal and routes it through the system to be utilized by other peripherals. This mechanism is functional in both System ON and System OFF mode. See GPIO port and the GPIO pin details.

The following figure illustrates the GPIO port containing 32 individual pins, where PIN0 is shown in more detail for reference. All signals on the left side of the illustration are used by other peripherals in the system and therefore not directly available to the CPU.

Figure 1. GPIO port and the GPIO pin details

GPIO port and the GPIO pin details

Pins should be in a level that cannot trigger the sense mechanism before being enabled. If the SENSE condition configured in the PIN_CNF registers is met when the sense mechanism is enabled, the DETECT signal will immediately go high. A PORT event is triggered if the DETECT signal was low before enabling the sense mechanism. See GPIOTE — GPIO tasks and events.

See the following peripherals for more information about how the DETECT signal is used:

When a pin's PINx.DETECT signal goes high, a flag is set in the LATCH register. For example, when the PIN0.DETECT signal goes high, bit 0 in the LATCH register is set to 1. If the CPU performs a clear operation on a bit in the LATCH register when the associated PINx.DETECT signal is high, the bit in the LATCH register will not be cleared. The LATCH register will only be cleared if the CPU explicitly clears it by writing a 1 to the bit that shall be cleared, i.e. the LATCH register will not be affected by a PINx.DETECT signal being set low.

The LDETECT signal will be set high when one or more bits in the LATCH register are 1. The LDETECT signal will be set low when all bits in the LATCH register are successfully cleared to 0.

If one or more bits in the LATCH register are 1 after the CPU has performed a clear operation on the LATCH register, a rising edge will be generated on the LDETECT signal. This is illustrated in DETECT signal behavior.

Note: The CPU can read the LATCH register at any time to check if a SENSE condition has been met on any of the GPIO pins. This is still valid if that condition is no longer met at the time the CPU queries the LATCH register. This mechanism will work even if the LDETECT signal is not used as the DETECT signal.

The LDETECT signal is by default not connected to the GPIO port's DETECT signal, but via the DETECTMODE register. It is possible to change from default behavior to the DETECT signal that is derived directly from the LDETECT signal. See GPIO port and the GPIO pin details. The following figure illustrates the DETECT signal behavior for these two alternatives.

Figure 2. DETECT signal behavior

DETECT signal behavior

A GPIO pin input buffer can be disconnected from the pin to enable power savings when the pin is not used as an input, see GPIO port and the GPIO pin details. Input buffers must be connected to get a valid input value in the IN register, and for the sense mechanism to get access to the pin.

Other peripherals in the system can connect to GPIO pins and override their output value and configuration, or read their analog or digital input value. See GPIO port and the GPIO pin details.

Selected pins also support analog input signals, see ANAIN in GPIO port and the GPIO pin details. The assignment of the analog pins can be found in Pin assignments.

Note: When a pin is configured as digital input, increased current consumption occurs when the input voltage is between VIL and VIH. It is good practice to ensure that the external circuitry does not drive that pin to levels between VIL and VIH for a long period of time.

Registers

Instances

Instance Base address Description
GPIO 0x50000000

General purpose input and output

This instance is deprecated.

P0 0x50000000

General purpose input and output, port 0

P1 0x50000300

General purpose input and output, port 1

Configuration

Instance Configuration
GPIO
P0

P0.00 to P0.31 implemented

P1

P1.00 to P1.15 implemented

Register overview

Register Offset Description
OUT 0x504

Write GPIO port

OUTSET 0x508

Set individual bits in GPIO port

OUTCLR 0x50C

Clear individual bits in GPIO port

IN 0x510

Read GPIO port

DIR 0x514

Direction of GPIO pins

DIRSET 0x518

DIR set register

DIRCLR 0x51C

DIR clear register

LATCH 0x520

Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers

DETECTMODE 0x524

Select between default DETECT signal behavior and LDETECT mode

PIN_CNF[0] 0x700

Configuration of GPIO pins

PIN_CNF[1] 0x704

Configuration of GPIO pins

PIN_CNF[2] 0x708

Configuration of GPIO pins

PIN_CNF[3] 0x70C

Configuration of GPIO pins

PIN_CNF[4] 0x710

Configuration of GPIO pins

PIN_CNF[5] 0x714

Configuration of GPIO pins

PIN_CNF[6] 0x718

Configuration of GPIO pins

PIN_CNF[7] 0x71C

Configuration of GPIO pins

PIN_CNF[8] 0x720

Configuration of GPIO pins

PIN_CNF[9] 0x724

Configuration of GPIO pins

PIN_CNF[10] 0x728

Configuration of GPIO pins

PIN_CNF[11] 0x72C

Configuration of GPIO pins

PIN_CNF[12] 0x730

Configuration of GPIO pins

PIN_CNF[13] 0x734

Configuration of GPIO pins

PIN_CNF[14] 0x738

Configuration of GPIO pins

PIN_CNF[15] 0x73C

Configuration of GPIO pins

PIN_CNF[16] 0x740

Configuration of GPIO pins

PIN_CNF[17] 0x744

Configuration of GPIO pins

PIN_CNF[18] 0x748

Configuration of GPIO pins

PIN_CNF[19] 0x74C

Configuration of GPIO pins

PIN_CNF[20] 0x750

Configuration of GPIO pins

PIN_CNF[21] 0x754

Configuration of GPIO pins

PIN_CNF[22] 0x758

Configuration of GPIO pins

PIN_CNF[23] 0x75C

Configuration of GPIO pins

PIN_CNF[24] 0x760

Configuration of GPIO pins

PIN_CNF[25] 0x764

Configuration of GPIO pins

PIN_CNF[26] 0x768

Configuration of GPIO pins

PIN_CNF[27] 0x76C

Configuration of GPIO pins

PIN_CNF[28] 0x770

Configuration of GPIO pins

PIN_CNF[29] 0x774

Configuration of GPIO pins

PIN_CNF[30] 0x778

Configuration of GPIO pins

PIN_CNF[31] 0x77C

Configuration of GPIO pins

OUT

Address offset: 0x504

Write GPIO port

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW

PIN0

Pin 0

Low

0

Pin driver is low

High

1

Pin driver is high

B

RW

PIN1

Pin 1

Low

0

Pin driver is low

High

1

Pin driver is high

C

RW

PIN2

Pin 2

Low

0

Pin driver is low

High

1

Pin driver is high

D

RW

PIN3

Pin 3

Low

0

Pin driver is low

High

1

Pin driver is high

E

RW

PIN4

Pin 4

Low

0

Pin driver is low

High

1

Pin driver is high

F

RW

PIN5

Pin 5

Low

0

Pin driver is low

High

1

Pin driver is high

G

RW

PIN6

Pin 6

Low

0

Pin driver is low

High

1

Pin driver is high

H

RW

PIN7

Pin 7

Low

0

Pin driver is low

High

1

Pin driver is high

I

RW

PIN8

Pin 8

Low

0

Pin driver is low

High

1

Pin driver is high

J

RW

PIN9

Pin 9

Low

0

Pin driver is low

High

1

Pin driver is high

K

RW

PIN10

Pin 10

Low

0

Pin driver is low

High

1

Pin driver is high

L

RW

PIN11

Pin 11

Low

0

Pin driver is low

High

1

Pin driver is high

M

RW

PIN12

Pin 12

Low

0

Pin driver is low

High

1

Pin driver is high

N

RW

PIN13

Pin 13

Low

0

Pin driver is low

High

1

Pin driver is high

O

RW

PIN14

Pin 14

Low

0

Pin driver is low

High

1

Pin driver is high

P

RW

PIN15

Pin 15

Low

0

Pin driver is low

High

1

Pin driver is high

Q

RW

PIN16

Pin 16

Low

0

Pin driver is low

High

1

Pin driver is high

R

RW

PIN17

Pin 17

Low

0

Pin driver is low

High

1

Pin driver is high

S

RW

PIN18

Pin 18

Low

0

Pin driver is low

High

1

Pin driver is high

T

RW

PIN19

Pin 19

Low

0

Pin driver is low

High

1

Pin driver is high

U

RW

PIN20

Pin 20

Low

0

Pin driver is low

High

1

Pin driver is high

V

RW

PIN21

Pin 21

Low

0

Pin driver is low

High

1

Pin driver is high

W

RW

PIN22

Pin 22

Low

0

Pin driver is low

High

1

Pin driver is high

X

RW

PIN23

Pin 23

Low

0

Pin driver is low

High

1

Pin driver is high

Y

RW

PIN24

Pin 24

Low

0

Pin driver is low

High

1

Pin driver is high

Z

RW

PIN25

Pin 25

Low

0

Pin driver is low

High

1

Pin driver is high

a

RW

PIN26

Pin 26

Low

0

Pin driver is low

High

1

Pin driver is high

b

RW

PIN27

Pin 27

Low

0

Pin driver is low

High

1

Pin driver is high

c

RW

PIN28

Pin 28

Low

0

Pin driver is low

High

1

Pin driver is high

d

RW

PIN29

Pin 29

Low

0

Pin driver is low

High

1

Pin driver is high

e

RW

PIN30

Pin 30

Low

0

Pin driver is low

High

1

Pin driver is high

f

RW

PIN31

Pin 31

Low

0

Pin driver is low

High

1

Pin driver is high

OUTSET

Address offset: 0x508

Set individual bits in GPIO port

Note: Read: reads value of OUT register.
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1S

PIN0

Pin 0

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

B

RW
W1S

PIN1

Pin 1

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

C

RW
W1S

PIN2

Pin 2

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

D

RW
W1S

PIN3

Pin 3

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

E

RW
W1S

PIN4

Pin 4

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

F

RW
W1S

PIN5

Pin 5

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

G

RW
W1S

PIN6

Pin 6

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

H

RW
W1S

PIN7

Pin 7

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

I

RW
W1S

PIN8

Pin 8

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

J

RW
W1S

PIN9

Pin 9

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

K

RW
W1S

PIN10

Pin 10

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

L

RW
W1S

PIN11

Pin 11

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

M

RW
W1S

PIN12

Pin 12

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

N

RW
W1S

PIN13

Pin 13

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

O

RW
W1S

PIN14

Pin 14

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

P

RW
W1S

PIN15

Pin 15

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

Q

RW
W1S

PIN16

Pin 16

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

R

RW
W1S

PIN17

Pin 17

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

S

RW
W1S

PIN18

Pin 18

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

T

RW
W1S

PIN19

Pin 19

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

U

RW
W1S

PIN20

Pin 20

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

V

RW
W1S

PIN21

Pin 21

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

W

RW
W1S

PIN22

Pin 22

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

X

RW
W1S

PIN23

Pin 23

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

Y

RW
W1S

PIN24

Pin 24

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

Z

RW
W1S

PIN25

Pin 25

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

a

RW
W1S

PIN26

Pin 26

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

b

RW
W1S

PIN27

Pin 27

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

c

RW
W1S

PIN28

Pin 28

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

d

RW
W1S

PIN29

Pin 29

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

e

RW
W1S

PIN30

Pin 30

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

f

RW
W1S

PIN31

Pin 31

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Set

1

Write: a '1' sets the pin high; a '0' has no effect

OUTCLR

Address offset: 0x50C

Clear individual bits in GPIO port

Note: Read: reads value of OUT register.
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1C

PIN0

Pin 0

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

B

RW
W1C

PIN1

Pin 1

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

C

RW
W1C

PIN2

Pin 2

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

D

RW
W1C

PIN3

Pin 3

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

E

RW
W1C

PIN4

Pin 4

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

F

RW
W1C

PIN5

Pin 5

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

G

RW
W1C

PIN6

Pin 6

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

H

RW
W1C

PIN7

Pin 7

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

I

RW
W1C

PIN8

Pin 8

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

J

RW
W1C

PIN9

Pin 9

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

K

RW
W1C

PIN10

Pin 10

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

L

RW
W1C

PIN11

Pin 11

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

M

RW
W1C

PIN12

Pin 12

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

N

RW
W1C

PIN13

Pin 13

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

O

RW
W1C

PIN14

Pin 14

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

P

RW
W1C

PIN15

Pin 15

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

Q

RW
W1C

PIN16

Pin 16

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

R

RW
W1C

PIN17

Pin 17

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

S

RW
W1C

PIN18

Pin 18

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

T

RW
W1C

PIN19

Pin 19

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

U

RW
W1C

PIN20

Pin 20

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

V

RW
W1C

PIN21

Pin 21

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

W

RW
W1C

PIN22

Pin 22

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

X

RW
W1C

PIN23

Pin 23

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

Y

RW
W1C

PIN24

Pin 24

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

Z

RW
W1C

PIN25

Pin 25

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

a

RW
W1C

PIN26

Pin 26

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

b

RW
W1C

PIN27

Pin 27

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

c

RW
W1C

PIN28

Pin 28

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

d

RW
W1C

PIN29

Pin 29

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

e

RW
W1C

PIN30

Pin 30

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

f

RW
W1C

PIN31

Pin 31

Low

0

Read: pin driver is low

High

1

Read: pin driver is high

Clear

1

Write: a '1' sets the pin low; a '0' has no effect

IN

Address offset: 0x510

Read GPIO port

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

R

PIN0

Pin 0

Low

0

Pin input is low

High

1

Pin input is high

B

R

PIN1

Pin 1

Low

0

Pin input is low

High

1

Pin input is high

C

R

PIN2

Pin 2

Low

0

Pin input is low

High

1

Pin input is high

D

R

PIN3

Pin 3

Low

0

Pin input is low

High

1

Pin input is high

E

R

PIN4

Pin 4

Low

0

Pin input is low

High

1

Pin input is high

F

R

PIN5

Pin 5

Low

0

Pin input is low

High

1

Pin input is high

G

R

PIN6

Pin 6

Low

0

Pin input is low

High

1

Pin input is high

H

R

PIN7

Pin 7

Low

0

Pin input is low

High

1

Pin input is high

I

R

PIN8

Pin 8

Low

0

Pin input is low

High

1

Pin input is high

J

R

PIN9

Pin 9

Low

0

Pin input is low

High

1

Pin input is high

K

R

PIN10

Pin 10

Low

0

Pin input is low

High

1

Pin input is high

L

R

PIN11

Pin 11

Low

0

Pin input is low

High

1

Pin input is high

M

R

PIN12

Pin 12

Low

0

Pin input is low

High

1

Pin input is high

N

R

PIN13

Pin 13

Low

0

Pin input is low

High

1

Pin input is high

O

R

PIN14

Pin 14

Low

0

Pin input is low

High

1

Pin input is high

P

R

PIN15

Pin 15

Low

0

Pin input is low

High

1

Pin input is high

Q

R

PIN16

Pin 16

Low

0

Pin input is low

High

1

Pin input is high

R

R

PIN17

Pin 17

Low

0

Pin input is low

High

1

Pin input is high

S

R

PIN18

Pin 18

Low

0

Pin input is low

High

1

Pin input is high

T

R

PIN19

Pin 19

Low

0

Pin input is low

High

1

Pin input is high

U

R

PIN20

Pin 20

Low

0

Pin input is low

High

1

Pin input is high

V

R

PIN21

Pin 21

Low

0

Pin input is low

High

1

Pin input is high

W

R

PIN22

Pin 22

Low

0

Pin input is low

High

1

Pin input is high

X

R

PIN23

Pin 23

Low

0

Pin input is low

High

1

Pin input is high

Y

R

PIN24

Pin 24

Low

0

Pin input is low

High

1

Pin input is high

Z

R

PIN25

Pin 25

Low

0

Pin input is low

High

1

Pin input is high

a

R

PIN26

Pin 26

Low

0

Pin input is low

High

1

Pin input is high

b

R

PIN27

Pin 27

Low

0

Pin input is low

High

1

Pin input is high

c

R

PIN28

Pin 28

Low

0

Pin input is low

High

1

Pin input is high

d

R

PIN29

Pin 29

Low

0

Pin input is low

High

1

Pin input is high

e

R

PIN30

Pin 30

Low

0

Pin input is low

High

1

Pin input is high

f

R

PIN31

Pin 31

Low

0

Pin input is low

High

1

Pin input is high

DIR

Address offset: 0x514

Direction of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW

PIN0

Pin 0

Input

0

Pin set as input

Output

1

Pin set as output

B

RW

PIN1

Pin 1

Input

0

Pin set as input

Output

1

Pin set as output

C

RW

PIN2

Pin 2

Input

0

Pin set as input

Output

1

Pin set as output

D

RW

PIN3

Pin 3

Input

0

Pin set as input

Output

1

Pin set as output

E

RW

PIN4

Pin 4

Input

0

Pin set as input

Output

1

Pin set as output

F

RW

PIN5

Pin 5

Input

0

Pin set as input

Output

1

Pin set as output

G

RW

PIN6

Pin 6

Input

0

Pin set as input

Output

1

Pin set as output

H

RW

PIN7

Pin 7

Input

0

Pin set as input

Output

1

Pin set as output

I

RW

PIN8

Pin 8

Input

0

Pin set as input

Output

1

Pin set as output

J

RW

PIN9

Pin 9

Input

0

Pin set as input

Output

1

Pin set as output

K

RW

PIN10

Pin 10

Input

0

Pin set as input

Output

1

Pin set as output

L

RW

PIN11

Pin 11

Input

0

Pin set as input

Output

1

Pin set as output

M

RW

PIN12

Pin 12

Input

0

Pin set as input

Output

1

Pin set as output

N

RW

PIN13

Pin 13

Input

0

Pin set as input

Output

1

Pin set as output

O

RW

PIN14

Pin 14

Input

0

Pin set as input

Output

1

Pin set as output

P

RW

PIN15

Pin 15

Input

0

Pin set as input

Output

1

Pin set as output

Q

RW

PIN16

Pin 16

Input

0

Pin set as input

Output

1

Pin set as output

R

RW

PIN17

Pin 17

Input

0

Pin set as input

Output

1

Pin set as output

S

RW

PIN18

Pin 18

Input

0

Pin set as input

Output

1

Pin set as output

T

RW

PIN19

Pin 19

Input

0

Pin set as input

Output

1

Pin set as output

U

RW

PIN20

Pin 20

Input

0

Pin set as input

Output

1

Pin set as output

V

RW

PIN21

Pin 21

Input

0

Pin set as input

Output

1

Pin set as output

W

RW

PIN22

Pin 22

Input

0

Pin set as input

Output

1

Pin set as output

X

RW

PIN23

Pin 23

Input

0

Pin set as input

Output

1

Pin set as output

Y

RW

PIN24

Pin 24

Input

0

Pin set as input

Output

1

Pin set as output

Z

RW

PIN25

Pin 25

Input

0

Pin set as input

Output

1

Pin set as output

a

RW

PIN26

Pin 26

Input

0

Pin set as input

Output

1

Pin set as output

b

RW

PIN27

Pin 27

Input

0

Pin set as input

Output

1

Pin set as output

c

RW

PIN28

Pin 28

Input

0

Pin set as input

Output

1

Pin set as output

d

RW

PIN29

Pin 29

Input

0

Pin set as input

Output

1

Pin set as output

e

RW

PIN30

Pin 30

Input

0

Pin set as input

Output

1

Pin set as output

f

RW

PIN31

Pin 31

Input

0

Pin set as input

Output

1

Pin set as output

DIRSET

Address offset: 0x518

DIR set register

Note: Read: reads value of DIR register.
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1S

PIN0

Set as output pin 0

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

B

RW
W1S

PIN1

Set as output pin 1

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

C

RW
W1S

PIN2

Set as output pin 2

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

D

RW
W1S

PIN3

Set as output pin 3

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

E

RW
W1S

PIN4

Set as output pin 4

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

F

RW
W1S

PIN5

Set as output pin 5

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

G

RW
W1S

PIN6

Set as output pin 6

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

H

RW
W1S

PIN7

Set as output pin 7

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

I

RW
W1S

PIN8

Set as output pin 8

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

J

RW
W1S

PIN9

Set as output pin 9

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

K

RW
W1S

PIN10

Set as output pin 10

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

L

RW
W1S

PIN11

Set as output pin 11

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

M

RW
W1S

PIN12

Set as output pin 12

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

N

RW
W1S

PIN13

Set as output pin 13

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

O

RW
W1S

PIN14

Set as output pin 14

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

P

RW
W1S

PIN15

Set as output pin 15

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

Q

RW
W1S

PIN16

Set as output pin 16

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

R

RW
W1S

PIN17

Set as output pin 17

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

S

RW
W1S

PIN18

Set as output pin 18

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

T

RW
W1S

PIN19

Set as output pin 19

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

U

RW
W1S

PIN20

Set as output pin 20

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

V

RW
W1S

PIN21

Set as output pin 21

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

W

RW
W1S

PIN22

Set as output pin 22

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

X

RW
W1S

PIN23

Set as output pin 23

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

Y

RW
W1S

PIN24

Set as output pin 24

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

Z

RW
W1S

PIN25

Set as output pin 25

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

a

RW
W1S

PIN26

Set as output pin 26

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

b

RW
W1S

PIN27

Set as output pin 27

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

c

RW
W1S

PIN28

Set as output pin 28

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

d

RW
W1S

PIN29

Set as output pin 29

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

e

RW
W1S

PIN30

Set as output pin 30

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

f

RW
W1S

PIN31

Set as output pin 31

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Set

1

Write: a '1' sets pin to output; a '0' has no effect

DIRCLR

Address offset: 0x51C

DIR clear register

Note: Read: reads value of DIR register.
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1C

PIN0

Set as input pin 0

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

B

RW
W1C

PIN1

Set as input pin 1

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

C

RW
W1C

PIN2

Set as input pin 2

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

D

RW
W1C

PIN3

Set as input pin 3

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

E

RW
W1C

PIN4

Set as input pin 4

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

F

RW
W1C

PIN5

Set as input pin 5

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

G

RW
W1C

PIN6

Set as input pin 6

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

H

RW
W1C

PIN7

Set as input pin 7

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

I

RW
W1C

PIN8

Set as input pin 8

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

J

RW
W1C

PIN9

Set as input pin 9

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

K

RW
W1C

PIN10

Set as input pin 10

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

L

RW
W1C

PIN11

Set as input pin 11

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

M

RW
W1C

PIN12

Set as input pin 12

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

N

RW
W1C

PIN13

Set as input pin 13

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

O

RW
W1C

PIN14

Set as input pin 14

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

P

RW
W1C

PIN15

Set as input pin 15

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

Q

RW
W1C

PIN16

Set as input pin 16

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

R

RW
W1C

PIN17

Set as input pin 17

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

S

RW
W1C

PIN18

Set as input pin 18

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

T

RW
W1C

PIN19

Set as input pin 19

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

U

RW
W1C

PIN20

Set as input pin 20

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

V

RW
W1C

PIN21

Set as input pin 21

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

W

RW
W1C

PIN22

Set as input pin 22

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

X

RW
W1C

PIN23

Set as input pin 23

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

Y

RW
W1C

PIN24

Set as input pin 24

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

Z

RW
W1C

PIN25

Set as input pin 25

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

a

RW
W1C

PIN26

Set as input pin 26

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

b

RW
W1C

PIN27

Set as input pin 27

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

c

RW
W1C

PIN28

Set as input pin 28

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

d

RW
W1C

PIN29

Set as input pin 29

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

e

RW
W1C

PIN30

Set as input pin 30

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

f

RW
W1C

PIN31

Set as input pin 31

Input

0

Read: pin set as input

Output

1

Read: pin set as output

Clear

1

Write: a '1' sets pin to input; a '0' has no effect

LATCH

Address offset: 0x520

Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW

PIN0

Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

B

RW

PIN1

Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

C

RW

PIN2

Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

D

RW

PIN3

Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

E

RW

PIN4

Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

F

RW

PIN5

Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

G

RW

PIN6

Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

H

RW

PIN7

Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

I

RW

PIN8

Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

J

RW

PIN9

Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

K

RW

PIN10

Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

L

RW

PIN11

Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

M

RW

PIN12

Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

N

RW

PIN13

Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

O

RW

PIN14

Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

P

RW

PIN15

Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

Q

RW

PIN16

Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

R

RW

PIN17

Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

S

RW

PIN18

Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

T

RW

PIN19

Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

U

RW

PIN20

Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

V

RW

PIN21

Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

W

RW

PIN22

Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

X

RW

PIN23

Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

Y

RW

PIN24

Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

Z

RW

PIN25

Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

a

RW

PIN26

Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

b

RW

PIN27

Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

c

RW

PIN28

Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

d

RW

PIN29

Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

e

RW

PIN30

Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

f

RW

PIN31

Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met

DETECTMODE

Address offset: 0x524

Select between default DETECT signal behavior and LDETECT mode

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW

DETECTMODE

Select between default DETECT signal behavior and LDETECT mode

Default

0

DETECT directly connected to PIN DETECT signals

LDETECT

1

Use the latched LDETECT behavior

PIN_CNF[0]

Address offset: 0x700

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[1]

Address offset: 0x704

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[2]

Address offset: 0x708

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[3]

Address offset: 0x70C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[4]

Address offset: 0x710

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[5]

Address offset: 0x714

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[6]

Address offset: 0x718

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[7]

Address offset: 0x71C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[8]

Address offset: 0x720

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[9]

Address offset: 0x724

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[10]

Address offset: 0x728

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[11]

Address offset: 0x72C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[12]

Address offset: 0x730

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[13]

Address offset: 0x734

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[14]

Address offset: 0x738

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[15]

Address offset: 0x73C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[16]

Address offset: 0x740

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[17]

Address offset: 0x744

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[18]

Address offset: 0x748

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[19]

Address offset: 0x74C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[20]

Address offset: 0x750

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[21]

Address offset: 0x754

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[22]

Address offset: 0x758

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[23]

Address offset: 0x75C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[24]

Address offset: 0x760

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[25]

Address offset: 0x764

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[26]

Address offset: 0x768

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[27]

Address offset: 0x76C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[28]

Address offset: 0x770

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[29]

Address offset: 0x774

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[30]

Address offset: 0x778

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

PIN_CNF[31]

Address offset: 0x77C

Configuration of GPIO pins

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID E E D D D C C B A
Reset 0x00000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID R/W Field Value ID Value Description
A

RW

DIR

Pin direction. Same physical register as DIR register

Input

0

Configure pin as an input pin

Output

1

Configure pin as an output pin

B

RW

INPUT

Connect or disconnect input buffer

Connect

0

Connect input buffer

Disconnect

1

Disconnect input buffer

C

RW

PULL

Pull configuration

Disabled

0

No pull

Pulldown

1

Pull down on pin

Pullup

3

Pull up on pin

D

RW

DRIVE

Drive configuration

S0S1

0

Standard '0', standard '1'

H0S1

1

High drive '0', standard '1'

S0H1

2

Standard '0', high drive '1'

H0H1

3

High drive '0', high 'drive '1''

D0S1

4

Disconnect '0' standard '1' (normally used for wired-or connections)

D0H1

5

Disconnect '0', high drive '1' (normally used for wired-or connections)

S0D1

6

Standard '0'. disconnect '1' (normally used for wired-and connections)

H0D1

7

High drive '0', disconnect '1' (normally used for wired-and connections)

E

RW

SENSE

Pin sensing mechanism

Disabled

0

Disabled

High

2

Sense for high level

Low

3

Sense for low level

Electrical specification

GPIO Electrical Specification

Symbol Description Min. Typ. Max. Units
VIH

Input high voltage

0.7 x VDD VDD V
VIL

Input low voltage

VSS 0.3 x VDD V
VOH,SD

Output high voltage, standard drive, 0.5 mA, VDD ≥ 1.7

VDD - 0.4 VDD V
VOH,HDH

Output high voltage, high drive, 5 mA, VDD ≥ 2.7 V

VDD - 0.4 VDD V
VOH,HDL

Output high voltage, high drive, 3 mA, VDD ≥ 1.7 V

VDD - 0.4 VDD V
VOL,SD

Output low voltage, standard drive, 0.5 mA, VDD ≥ 1.7

VSS VSS + 0.4 V
VOL,HDH

Output low voltage, high drive, 5 mA, VDD ≥ 2.7 V

VSS VSS + 0.4 V
VOL,HDL

Output low voltage, high drive, 3 mA, VDD ≥ 1.7 V

VSS VSS + 0.4 V
IOL,SD

Current at VSS+0.4 V, output set low, standard drive, VDD ≥ 1.7

1 2 4 mA
IOL,HDH

Current at VSS+0.4 V, output set low, high drive, VDD ≥ 2.7 V

6 10 15 mA
IOL,HDL

Current at VSS+0.4 V, output set low, high drive, VDD ≥ 1.7 V

3 mA
IOH,SD

Current at VDD-0.4 V, output set high, standard drive, VDD ≥ 1.7

1 2 4 mA
IOH,HDH

Current at VDD-0.4 V, output set high, high drive, VDD ≥ 2.7 V

6 9 14 mA
IOH,HDL

Current at VDD-0.4 V, output set high, high drive, VDD ≥ 1.7 V

3 mA
tRF,15pF

Rise/fall time, standard drive mode, 10-90%, 15 pF load1

9 ns
tRF,25pF

Rise/fall time, standard drive mode, 10-90%, 25 pF load1

13 ns
tRF,50pF

Rise/fall time, standard drive mode, 10-90%, 50 pF load1

25 ns
tHRF,15pF

Rise/Fall time, high drive mode, 10-90%, 15 pF load1

4 ns
tHRF,25pF

Rise/Fall time, high drive mode, 10-90%, 25 pF load1

5 ns
tHRF,50pF

Rise/Fall time, high drive mode, 10-90%, 50 pF load1

8 ns
RPU

Pull-up resistance

11 13 16
RPD

Pull-down resistance

11 13 16
CPAD

Pad capacitance

3 pF

NFC Pads Electrical Specification

Symbol Description Min. Typ. Max. Units
CPAD_NFC

Pad capacitance on NFC pads

4 pF
INFC_LEAK

Leakage current between NFC pads when driven to different states

1 10 µA
1 Rise and fall times based on simulations