To ensure good RF performance when designing PCBs, it is highly recommended to use the PCB layouts and component values provided by Nordic Semiconductor.

Documentation for the different package reference circuits, including Altium Designer files, PCB layout files, and PCB production files can be downloaded from the product page for the nRF52840 on www.nordicsemi.com.

In this section there are reference circuits for QIAA aQFN73™, QFAA QFN48, and CKAA WLCSP showing the components and component values to support on-chip features in a design.

Note: This is not a complete list of configurations, but all required circuitry is shown for further configurations.
Some general guidance is summarized here:
  • External supply from VDD is only available when power is supplied to VDDH. External supply is annotated with the VEXT net name.
  • When supplying power from a USB source only, VBUS must be connected to VDDH if USB is to be used.
  • Components required for DC/DC function are only needed if DC/DC mode is enabled for that regulator.
  • NFC can be used in any configuration.
  • USB can be used in any configuration as long as VBUS is supplied by the USB host.
  • The schematics include an optional series resistor on the USB supply for improved immunity to transient overvoltage during VBUS connection. Using the series resistor is recommended for new designs.
  • Two component values for the RF-Match network for the QIAA aQFN73 package are given and referred to as v1.0 and v1.1 in the following tables. The reference schematics use v1.1 component values, which are recommended for new designs to improve the margin for spurious emissions during regulatory approval tests. However, both v1.0 and v1.1 are valid and can be used. All other RF parameters are unchanged.
  • A new reference design with four-component RF match has been added for the QIAA aQFN™73 package. The four-component RF match improves harmonic suppression when using Radio with TXPOWER equal to 5dBm or above. However, previous 3 component RF-match designs are valid and can be used. Using this four-component RF match is recommended for new designs.

Circuit configurations for QIAA aQFN73

Table 1. Circuit configurations
Config no. Supply configuration Features that can be enabled for each configuration example
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 1 USB (VDDH = VBUS) N/A Yes No No Yes No
Config. 2 Battery/Ext. regulator N/A Yes No No Yes No
Config. 3 N/A Battery/Ext. regulator No No No Yes No
Config. 4 Battery/Ext. regulator N/A Yes Yes Yes Yes No
Config. 5 N/A Battery/Ext. regulator No No Yes Yes Yes
Config. 6 N/A Battery/Ext. regulator No No No No No
Config. 71 Battery/Ext. regulator N/A Yes Yes Yes Yes No

1Reference design with four-component RF match.

Circuit configurations for QFAA QFN48

Table 2. Circuit configurations
Config no. Supply configuration Features that can be enabled for each configuration example
VDDH1 VDD EXTSUPPLY2 DCDCEN03 DCDCEN1 USB4 NFC
Config. 1 N/A Battery/Ext. regulator N/A N/A Yes N/A No

1High Voltage supply mode cannot be used because the VDDH pin is not routed in the QFN48 package.

2The external supply feature cannot be used because the VDDH pin is not routed in the QFN48 package.

3DCDC for REG0 stage cannot be used because the VDDH pin is not routed in the QFN48 package.

4USBD cannot be used because the USB pins are not routed in the QFN48 package.

Circuit configurations for CKAA WLCSP

Table 3. Circuit configurations
Config no. Supply configuration Features that can be enabled for each configuration example
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 1 USB (VDDH = VBUS) N/A Yes No No Yes No
Config. 2 Battery/Ext. regulator N/A Yes No No Yes No
Config. 3 N/A Battery/Ext. regulator No No No Yes No
Config. 4 Battery/Ext. regulator N/A Yes Yes Yes Yes No
Config. 5 N/A Battery/Ext. regulator No No Yes Yes Yes
Config. 6 N/A Battery/Ext. regulator No No No No No

Circuit configuration no. 1 for QIAA aQFN73

Circuit configuration number 1 for QIAA aQFN73, showing the schematic and the bill of materials.

Table 4. Configuration summary for circuit configuration no. 1
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 1 USB (VDDH = VBUS) N/A Yes No No Yes No
Figure 1. Circuit configuration no. 1 schematic

image/svg+xml 1 1 2 2 3 3 4 4 D D C C B B A A Title Size Project Number Date: File: Sheet of Drawn By: Revision nRF52840-QIAA Ref. Layout (LDO only, VBUS supply) 1.3 12.02.2021 nrf52840_qiaa_var1.SchDoc 1 1 RUBR A4 X1 32MHz C1 12pF C2 12pF C11 100pF C5 100nF C20 4.7 µ F XC1 XC2 VDD_nRF P0.07 P0.10/NFC2 P0.11 P0.12 P 1 . 0 0 P 0 . 1 8 / R E S E T P 0 . 1 9 P 0 . 2 0 P 0 . 2 1 P 0 . 2 2 P 0 . 2 3 P 1 . 1 0 DEC1 SWDCLK SWDIO C15 1.0 µ F P1.09 C10 N.C. P0.00/XL1 P0.01/XL2 P 0 . 0 2 / A I N 0 P 0 . 0 3 / A I N 1 VBUS_nRF VDD_nRF DEC3 P0.04/AIN2 P0.05/AIN3 P0.09/NFC1 C18 12pF C17 12pF X2 32.768kHz Optional P 1 . 1 1 P 1 . 1 2 P 1 . 1 3 P 1 . 1 4 VDD_nRF C7 100nF D + D - VDD_nRF C8 100nF P1.01 P1.02 P1.03 P1.04 P1.05 P1.06 P1.07 P 1 . 1 5 P0.08 P1.08 P0.06 P0.26 P0.27 P 0 . 2 4 P 0 . 2 5 P 0 . 1 3 P 0 . 1 4 P 0 . 1 5 P 0 . 1 6 P 0 . 1 7 C12 100nF VDD_nRF C13 N.C. P 0 . 2 8 / A I N 4 P 0 . 2 9 / A I N 5 P 0 . 3 0 / A I N 6 P 0 . 3 1 / A I N 7 C19 4.7 µ F C14 1.0 µ F C6 4.7 µ F VBUS_nRF VEXT DEC4_6 D E C 4 _ 6 C3 0.8pF L1 4.7nH RF C4 0.5pF C22 N.C. DEC1 C1 VDD W1 VSS_PA F23 ANT H23 DEC6 E24 DEC3 D23 XC1 B24 XC2 A23 V D D A 2 2 P 1 . 1 0 A 2 0 P0.00/XL1 D2 P0.01/XL2 F2 P 0 . 2 8 / A I N 4 B 1 1 D E C 4 B 5 V S S B 7 V D D B 1 D C C B 3 SWDCLK AA24 SWDIO AC24 P1.01 Y23 D - A D 4 P 0 . 1 9 A C 1 5 nRF52840 VDDH Y2 DCCH AB2 V B U S A D 2 DECUSB AC5 D + A D 6 P 0 . 2 0 A D 1 6 P 0 . 2 1 A C 1 7 P 0 . 2 2 A D 1 8 P 0 . 2 3 A C 1 9 P 0 . 2 4 A D 2 0 VDD AD23 P0.09/NFC1 L24 P1.09 R1 P 0 . 2 5 A C 2 1 P 1 . 0 0 A D 2 2 P0.26 G1 P0.27 H2 P0.04/AIN2 J1 P0.05/AIN3 K2 P0.06 L1 P0.07 M2 P0.08 N1 P1.08 P2 P 0 . 1 3 A D 8 P 0 . 1 4 A C 9 P 0 . 1 5 A D 1 0 P 0 . 1 6 A C 1 1 P0.11 T2 P0.12 U1 P 0 . 1 7 A D 1 2 P 0 . 1 8 / R E S E T A C 1 3 DEC5 N24 P0.10/NFC2 J24 P 0 . 0 3 / A I N 1 B 1 3 P 0 . 0 2 / A I N 0 A 1 2 P 0 . 2 9 / A I N 5 A 1 0 P 0 . 3 0 / A I N 6 B 9 P 0 . 3 1 / A I N 7 A 8 V D D A D 1 4 P1.02 W24 P1.03 V23 P1.04 U24 P1.05 T23 P1.06 R24 P1.07 P23 P 1 . 1 1 B 1 9 P 1 . 1 2 B 1 7 P 1 . 1 3 A 1 6 P 1 . 1 4 B 1 5 P 1 . 1 5 A 1 4 D E C 2 A 1 8 G N D 7 4 U1 nRF52840-QIAA VBUS Optional R1 2R2 Not required for Fxx and later C9 820pF
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 5. Bill of material for circuit configuration no. 1
Designator Value v1.0 Value v1.1 Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0402
C3 1 pF 0.8 pF Capacitor, NP0, ±10% 0402
C4 1 pF 0.5 pF Capacitor, NP0, ±10% 0402
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0402
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, NP0, ±5%

Not required for Fxx and later

 0402
C10, C13, C22 N.C. Not mounted 0402
C11 100 pF Capacitor, NP0, ±5% 0402
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C19 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH 4.7 nH High frequency chip inductor ±5% 0402
R1 2R2 Resistor ±1%, 0.063W 0402
U1 nRF52840-QIAA Multiprotocol Bluetooth® low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip AQFN-73
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 3215, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_3215

Circuit configuration no. 2 for QIAA aQFN73

Circuit configuration number 2 for QIAA aQFN73, showing the schematic and the bill of materials.

Table 6. Configuration summary for circuit configuration no. 2
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 2 Battery/Ext. regulator N/A Yes No No Yes No
Figure 2. Circuit configuration no. 2 schematic

image/svg+xml 1 1 2 2 3 3 4 4 D D C C B B A A Title Size Project Number Date: File: Sheet of Drawn By: Revision nRF52840-QIAA Ref. Layout (LDO only, VDDH supply) 1.2 12.02.2021 nrf52840_qiaa_var2.SchDoc 1 1 RUBR A4 C21 4.7 µ F X1 32MHz C1 12pF C2 12pF C11 100pF C20 4.7 µ F XC1 XC2 P0.07 P0.10/NFC2 P0.11 P0.12 P 1 . 0 0 P 0 . 1 8 / R E S E T P 0 . 1 9 P 0 . 2 0 P 0 . 2 1 P 0 . 2 2 P 0 . 2 3 P 1 . 1 0 SWDCLK SWDIO C15 1.0 µ F P1.09 C10 N.C. P0.00/XL1 P0.01/XL2 P 0 . 0 2 / A I N 0 P 0 . 0 3 / A I N 1 VBUS VDD_nRF DEC3 P0.04/AIN2 P0.05/AIN3 P0.09/NFC1 C18 12pF C17 12pF X2 32.768kHz Optional P 1 . 1 1 P 1 . 1 2 P 1 . 1 3 P 1 . 1 4 VDD_nRF C7 100nF D + D - VDD_nRF C8 100nF P1.01 P1.02 P1.03 P1.04 P1.05 P1.06 P1.07 P 1 . 1 5 P0.08 P1.08 P0.06 P0.26 P0.27 P 0 . 2 4 P 0 . 2 5 P 0 . 1 3 P 0 . 1 4 P 0 . 1 5 P 0 . 1 6 P 0 . 1 7 C12 100nF VDD_nRF C13 N.C. P 0 . 2 8 / A I N 4 P 0 . 2 9 / A I N 5 P 0 . 3 0 / A I N 6 P 0 . 3 1 / A I N 7 C19 4.7 µ F C6 4.7 µ F VDDH VEXT DEC4_6 D E C 4 _ 6 C5 100nF VDD_nRF DEC1 C14 1.0 µ F C3 0.8pF L1 4.7nH RF C4 0.5pF C22 N.C. DEC1 C1 VDD W1 VSS_PA F23 ANT H23 DEC6 E24 DEC3 D23 XC1 B24 XC2 A23 V D D A 2 2 P 1 . 1 0 A 2 0 P0.00/XL1 D2 P0.01/XL2 F2 P 0 . 2 8 / A I N 4 B 1 1 D E C 4 B 5 V S S B 7 V D D B 1 D C C B 3 SWDCLK AA24 SWDIO AC24 P1.01 Y23 D - A D 4 P 0 . 1 9 A C 1 5 nRF52840 VDDH Y2 DCCH AB2 V B U S A D 2 DECUSB AC5 D + A D 6 P 0 . 2 0 A D 1 6 P 0 . 2 1 A C 1 7 P 0 . 2 2 A D 1 8 P 0 . 2 3 A C 1 9 P 0 . 2 4 A D 2 0 VDD AD23 P0.09/NFC1 L24 P1.09 R1 P 0 . 2 5 A C 2 1 P 1 . 0 0 A D 2 2 P0.26 G1 P0.27 H2 P0.04/AIN2 J1 P0.05/AIN3 K2 P0.06 L1 P0.07 M2 P0.08 N1 P1.08 P2 P 0 . 1 3 A D 8 P 0 . 1 4 A C 9 P 0 . 1 5 A D 1 0 P 0 . 1 6 A C 1 1 P0.11 T2 P0.12 U1 P 0 . 1 7 A D 1 2 P 0 . 1 8 / R E S E T A C 1 3 DEC5 N24 P0.10/NFC2 J24 P 0 . 0 3 / A I N 1 B 1 3 P 0 . 0 2 / A I N 0 A 1 2 P 0 . 2 9 / A I N 5 A 1 0 P 0 . 3 0 / A I N 6 B 9 P 0 . 3 1 / A I N 7 A 8 V D D A D 1 4 P1.02 W24 P1.03 V23 P1.04 U24 P1.05 T23 P1.06 R24 P1.07 P23 P 1 . 1 1 B 1 9 P 1 . 1 2 B 1 7 P 1 . 1 3 A 1 6 P 1 . 1 4 B 1 5 P 1 . 1 5 A 1 4 D E C 2 A 1 8 G N D 7 4 U1 nRF52840-QIAA Not required for Fxx and later C9 820pF
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 7. Bill of material for circuit configuration no. 2
Designator Value v1.0 Value v1.1 Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0402
C3 1 pF 0.8 pF Capacitor, NP0, ±10% 0402
C4 1 pF 0.5 pF Capacitor, NP0, ±10% 0402
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0402
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, NP0, ±5%

Not required for Fxx and later

 0402
C10, C13, C22 N.C. Not mounted 0402
C11 100 pF Capacitor, NP0, ±5% 0402
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C19, C21 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH 4.7 nH High frequency chip inductor ±5% 0402
U1 nRF52840-QIAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip AQFN-73
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 3215, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_3215

Circuit configuration no. 3 for QIAA aQFN73

Circuit configuration number 3 for QIAA aQFN73, showing the schematic and the bill of materials.

Table 8. Configuration summary for circuit configuration no. 3
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 3 N/A Battery/Ext. regulator No No No Yes No
Figure 3. Circuit configuration no. 3 schematic

image/svg+xml 1 1 2 2 3 3 4 4 D D C C B B A A Title Size Project Number Date: File: Sheet of Drawn By: Revision nRF52840-QIAA Ref. Layout (LDO only, VDD supply) 1.2 12.02.2021 nrf52840_qiaa_var3.SchDoc 1 1 RUBR A4 C21 4.7 µ F X1 32MHz C1 12pF C2 12pF C11 100pF C20 4.7 µ F XC1 XC2 P0.07 P0.10/NFC2 P0.11 P0.12 P 1 . 0 0 P 0 . 1 8 / R E S E T P 0 . 1 9 P 0 . 2 0 P 0 . 2 1 P 0 . 2 2 P 0 . 2 3 P 1 . 1 0 SWDCLK SWDIO C15 1.0 µ F P1.09 C10 N.C. P0.00/XL1 P0.01/XL2 P 0 . 0 2 / A I N 0 P 0 . 0 3 / A I N 1 VBUS VDD_nRF DEC3 P0.04/AIN2 P0.05/AIN3 P0.09/NFC1 C18 12pF C17 12pF X2 32.768kHz Optional P 1 . 1 1 P 1 . 1 2 P 1 . 1 3 P 1 . 1 4 VDD_nRF C7 100nF D + D - VDD_nRF C8 100nF P1.01 P1.02 P1.03 P1.04 P1.05 P1.06 P1.07 P 1 . 1 5 P0.08 P1.08 P0.06 P0.26 P0.27 P 0 . 2 4 P 0 . 2 5 P 0 . 1 3 P 0 . 1 4 P 0 . 1 5 P 0 . 1 6 P 0 . 1 7 C12 100nF VDD_nRF C13 N.C. P 0 . 2 8 / A I N 4 P 0 . 2 9 / A I N 5 P 0 . 3 0 / A I N 6 P 0 . 3 1 / A I N 7 C6 4.7 µ F DEC4_6 D E C 4 _ 6 C5 100nF VDD_nRF DEC1 C14 1.0 µ F C3 0.8pF L1 4.7nH RF C4 0.5pF C22 N.C. DEC1 C1 VDD W1 VSS_PA F23 ANT H23 DEC6 E24 DEC3 D23 XC1 B24 XC2 A23 V D D A 2 2 P 1 . 1 0 A 2 0 P0.00/XL1 D2 P0.01/XL2 F2 P 0 . 2 8 / A I N 4 B 1 1 D E C 4 B 5 V S S B 7 V D D B 1 D C C B 3 SWDCLK AA24 SWDIO AC24 P1.01 Y23 D - A D 4 P 0 . 1 9 A C 1 5 nRF52840 VDDH Y2 DCCH AB2 V B U S A D 2 DECUSB AC5 D + A D 6 P 0 . 2 0 A D 1 6 P 0 . 2 1 A C 1 7 P 0 . 2 2 A D 1 8 P 0 . 2 3 A C 1 9 P 0 . 2 4 A D 2 0 VDD AD23 P0.09/NFC1 L24 P1.09 R1 P 0 . 2 5 A C 2 1 P 1 . 0 0 A D 2 2 P0.26 G1 P0.27 H2 P0.04/AIN2 J1 P0.05/AIN3 K2 P0.06 L1 P0.07 M2 P0.08 N1 P1.08 P2 P 0 . 1 3 A D 8 P 0 . 1 4 A C 9 P 0 . 1 5 A D 1 0 P 0 . 1 6 A C 1 1 P0.11 T2 P0.12 U1 P 0 . 1 7 A D 1 2 P 0 . 1 8 / R E S E T A C 1 3 DEC5 N24 P0.10/NFC2 J24 P 0 . 0 3 / A I N 1 B 1 3 P 0 . 0 2 / A I N 0 A 1 2 P 0 . 2 9 / A I N 5 A 1 0 P 0 . 3 0 / A I N 6 B 9 P 0 . 3 1 / A I N 7 A 8 V D D A D 1 4 P1.02 W24 P1.03 V23 P1.04 U24 P1.05 T23 P1.06 R24 P1.07 P23 P 1 . 1 1 B 1 9 P 1 . 1 2 B 1 7 P 1 . 1 3 A 1 6 P 1 . 1 4 B 1 5 P 1 . 1 5 A 1 4 D E C 2 A 1 8 G N D 7 4 U1 nRF52840-QIAA Not required for Fxx and later C9 820pF
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 9. Bill of material for circuit configuration no. 3
Designator Value v1.0 Value v1.1 Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0402
C3 1 pF 0.8 pF Capacitor, NP0, ±10% 0402
C4 1 pF 0.5 pF Capacitor, NP0, ±10% 0402
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0402
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, NP0, ±5%

Not required for Fxx and later

 0402
C10, C13, C22 N.C. Not mounted 0402
C11 100 pF Capacitor, NP0, ±5% 0402
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C21 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH 4.7 nH High frequency chip inductor ±5% 0402
U1 nRF52840-QIAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip AQFN-73
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 3215, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_3215

Circuit configuration no. 4 for QIAA aQFN73

Circuit configuration number 4 for QIAA aQFN73, showing the schematic and the bill of materials.

Table 10. Configuration summary for circuit configuration no. 4
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 4 Battery/Ext. regulator N/A Yes Yes Yes Yes No
Figure 4. Circuit configuration no. 4 schematic for QIAA aQFN73

image/svg+xml 1 1 2 2 3 3 4 4 D D C C B B A A Title Size Project Number Date: File: Sheet of Drawn By: Revision nRF52840-QIAA Ref. Layout (DCDC, VDDH supply) 1.2 12.02.2021 nrf52840_qiaa_var4.SchDoc 1 1 RUBR A4 X1 32MHz C1 12pF C2 12pF C11 100pF C20 4.7 µ F XC1 XC2 P0.07 P0.10/NFC2 P0.11 P0.12 P 1 . 0 0 P 0 . 1 8 / R E S E T P 0 . 1 9 P 0 . 2 0 P 0 . 2 1 P 0 . 2 2 P 0 . 2 3 P 1 . 1 0 SWDCLK SWDIO L2 10 µ H C15 1.0 µ F L3 15nH P1.09 C10 N.C. P0.00/XL1 P0.01/XL2 P 0 . 0 2 / A I N 0 P 0 . 0 3 / A I N 1 VBUS VDD_nRF DEC3 P0.04/AIN2 P0.05/AIN3 P0.09/NFC1 C18 12pF C17 12pF X2 32.768kHz Optional P 1 . 1 1 P 1 . 1 2 P 1 . 1 3 P 1 . 1 4 L4 10 µ H VDD_HV VDD_nRF C7 100nF C21 4.7 µ F D + D - VDD_nRF C8 100nF Not required for Fxx and later C9 820pF P1.01 P1.02 P1.03 P1.04 P1.05 P1.06 P1.07 P 1 . 1 5 P0.08 P1.08 P0.06 P0.26 P0.27 P 0 . 2 4 P 0 . 2 5 P 0 . 1 3 P 0 . 1 4 P 0 . 1 5 P 0 . 1 6 P 0 . 1 7 C12 100nF VDD_nRF C13 N.C. P 0 . 2 8 / A I N 4 P 0 . 2 9 / A I N 5 P 0 . 3 0 / A I N 6 P 0 . 3 1 / A I N 7 C19 4.7 µ F C6 4.7 µ F VEXT C16 47nF DEC4_6 D E C 4 _ 6 C5 100nF VDD_nRF DEC1 C14 1.0 µ F C3 0.8pF L1 4.7nH RF C4 0.5pF C22 N.C. DEC1 C1 VDD W1 VSS_PA F23 ANT H23 DEC6 E24 DEC3 D23 XC1 B24 XC2 A23 V D D A 2 2 P 1 . 1 0 A 2 0 P0.00/XL1 D2 P0.01/XL2 F2 P 0 . 2 8 / A I N 4 B 1 1 D E C 4 B 5 V S S B 7 V D D B 1 D C C B 3 SWDCLK AA24 SWDIO AC24 P1.01 Y23 D - A D 4 P 0 . 1 9 A C 1 5 nRF52840 VDDH Y2 DCCH AB2 V B U S A D 2 DECUSB AC5 D + A D 6 P 0 . 2 0 A D 1 6 P 0 . 2 1 A C 1 7 P 0 . 2 2 A D 1 8 P 0 . 2 3 A C 1 9 P 0 . 2 4 A D 2 0 VDD AD23 P0.09/NFC1 L24 P1.09 R1 P 0 . 2 5 A C 2 1 P 1 . 0 0 A D 2 2 P0.26 G1 P0.27 H2 P0.04/AIN2 J1 P0.05/AIN3 K2 P0.06 L1 P0.07 M2 P0.08 N1 P1.08 P2 P 0 . 1 3 A D 8 P 0 . 1 4 A C 9 P 0 . 1 5 A D 1 0 P 0 . 1 6 A C 1 1 P0.11 T2 P0.12 U1 P 0 . 1 7 A D 1 2 P 0 . 1 8 / R E S E T A C 1 3 DEC5 N24 P0.10/NFC2 J24 P 0 . 0 3 / A I N 1 B 1 3 P 0 . 0 2 / A I N 0 A 1 2 P 0 . 2 9 / A I N 5 A 1 0 P 0 . 3 0 / A I N 6 B 9 P 0 . 3 1 / A I N 7 A 8 V D D A D 1 4 P1.02 W24 P1.03 V23 P1.04 U24 P1.05 T23 P1.06 R24 P1.07 P23 P 1 . 1 1 B 1 9 P 1 . 1 2 B 1 7 P 1 . 1 3 A 1 6 P 1 . 1 4 B 1 5 P 1 . 1 5 A 1 4 D E C 2 A 1 8 G N D 7 4 U1 nRF52840-QIAA
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 11. Bill of material for circuit configuration no. 4
Designator Value v1.0 Value v1.1 Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0402
C3 1 pF 0.8 pF Capacitor, NP0, ±10% 0402
C4 1 pF 0.5 pF Capacitor, NP0, ±10% 0402
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0402
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, NP0, ±5%

Not required for Fxx and later

 0402
C10, C13, C22 N.C. Not mounted 0402
C11 100 pF Capacitor, NP0, ±5% 0402
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C16 47 nF Capacitor, X7R, ±10% 0402
C19, C21 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH 4.7 nH High frequency chip inductor ±5% 0402
L2 10 µH Chip inductor, IDC, min = 50 mA, ±20% 0603
L3 15 nH High frequency chip inductor ±10% 0402
L4 10 µH Chip inductor, IDC, min = 80 mA, ±20% 0603
U1 nRF52840-QIAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip AQFN-73
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 3215, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_3215

Circuit configuration no. 5 for QIAA aQFN73

Circuit configuration number 5 for QIAA aQFN73, showing the schematic and the bill of materials.

Table 12. Configuration summary for circuit configuration no. 5
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 5 N/A Battery/Ext. regulator No No Yes Yes Yes
Figure 5. Circuit configuration no. 5 schematic

image/svg+xml 1 1 2 2 3 3 4 4 D D C C B B A A Title Size Project Number Date: File: Sheet of Drawn By: Revision nRF52840-QIAA Ref. Layout (DCDC, VDD supply, NFC) 1.2 12.02.2021 nrf52840_qiaa_var5.SchDoc 1 1 RUBR A4 X1 32MHz C1 12pF C2 12pF C11 100pF C20 4.7 µ F XC1 XC2 P0.07 P0.11 P0.12 P 1 . 0 0 P 0 . 1 8 / R E S E T P 0 . 1 9 P 0 . 2 0 P 0 . 2 1 P 0 . 2 2 P 0 . 2 3 P 1 . 1 0 SWDCLK SWDIO L2 10 µ H C15 1.0 µ F L3 15nH P1.09 C10 N.C. P0.00/XL1 P0.01/XL2 P 0 . 0 2 / A I N 0 P 0 . 0 3 / A I N 1 VBUS VDD_nRF DEC3 P0.04/AIN2 P0.05/AIN3 C18 12pF C17 12pF X2 32.768kHz Optional P 1 . 1 1 P 1 . 1 2 P 1 . 1 3 P 1 . 1 4 VDD_nRF C7 100nF C21 4.7 µ F D + D - VDD_nRF C8 100nF P1.01 P1.02 P1.03 P1.04 P1.05 P1.06 P1.07 P 1 . 1 5 P0.08 P1.08 P0.06 P0.26 P0.27 P 0 . 2 4 P 0 . 2 5 P 0 . 1 3 P 0 . 1 4 P 0 . 1 5 P 0 . 1 6 P 0 . 1 7 C12 100nF VDD_nRF C13 N.C. P 0 . 2 8 / A I N 4 P 0 . 2 9 / A I N 5 P 0 . 3 0 / A I N 6 P 0 . 3 1 / A I N 7 C6 4.7 µ F NFC1 NFC2 CT1 CT3 Note: The value of CT1, CT2, CT3 and CT4 must be tuned to match the selected NFC antenna. C16 47nF DEC4_6 D E C 4 _ 6 CT2 CT4 C5 100nF VDD_nRF DEC1 C14 1.0 µ F C3 0.8pF L1 4.7nH RF C4 0.5pF C22 N.C. DEC1 C1 VDD W1 VSS_PA F23 ANT H23 DEC6 E24 DEC3 D23 XC1 B24 XC2 A23 V D D A 2 2 P 1 . 1 0 A 2 0 P0.00/XL1 D2 P0.01/XL2 F2 P 0 . 2 8 / A I N 4 B 1 1 D E C 4 B 5 V S S B 7 V D D B 1 D C C B 3 SWDCLK AA24 SWDIO AC24 P1.01 Y23 D - A D 4 P 0 . 1 9 A C 1 5 nRF52840 VDDH Y2 DCCH AB2 V B U S A D 2 DECUSB AC5 D + A D 6 P 0 . 2 0 A D 1 6 P 0 . 2 1 A C 1 7 P 0 . 2 2 A D 1 8 P 0 . 2 3 A C 1 9 P 0 . 2 4 A D 2 0 VDD AD23 P0.09/NFC1 L24 P1.09 R1 P 0 . 2 5 A C 2 1 P 1 . 0 0 A D 2 2 P0.26 G1 P0.27 H2 P0.04/AIN2 J1 P0.05/AIN3 K2 P0.06 L1 P0.07 M2 P0.08 N1 P1.08 P2 P 0 . 1 3 A D 8 P 0 . 1 4 A C 9 P 0 . 1 5 A D 1 0 P 0 . 1 6 A C 1 1 P0.11 T2 P0.12 U1 P 0 . 1 7 A D 1 2 P 0 . 1 8 / R E S E T A C 1 3 DEC5 N24 P0.10/NFC2 J24 P 0 . 0 3 / A I N 1 B 1 3 P 0 . 0 2 / A I N 0 A 1 2 P 0 . 2 9 / A I N 5 A 1 0 P 0 . 3 0 / A I N 6 B 9 P 0 . 3 1 / A I N 7 A 8 V D D A D 1 4 P1.02 W24 P1.03 V23 P1.04 U24 P1.05 T23 P1.06 R24 P1.07 P23 P 1 . 1 1 B 1 9 P 1 . 1 2 B 1 7 P 1 . 1 3 A 1 6 P 1 . 1 4 B 1 5 P 1 . 1 5 A 1 4 D E C 2 A 1 8 G N D 7 4 U1 nRF52840-QIAA Not required for Fxx and later C9 820pF
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 13. Bill of material for circuit configuration no. 5
Designator Value v1.0 Value v1.1 Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0402
C3 1 pF 0.8 pF Capacitor, NP0, ±10% 0402
C4 1 pF 0.5 pF Capacitor, NP0, ±10% 0402
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0402
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF Capacitor, NP0, ±5% 0402
C10, C13, C22 N.C. Not mounted 0402
C11 100 pF Capacitor, NP0, ±5% 0402
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C16 47 nF Capacitor, X7R, ±10% 0402
C21 4.7 µF Capacitor, X7S, ±10% 0603
CT1, CT2, CT3, CT4 Antenna dependent Capacitor, NP0, ±5% 0402
L1 3.9 nH 4.7 nH High frequency chip inductor ±5% 0402
L2 10 µH Chip inductor, IDC, min = 50 mA, ±20% 0603
L3 15 nH High frequency chip inductor ±10% 0402
U1 nRF52840-QIAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip AQFN-73
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL 3215, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_3215

Circuit configuration no. 6 for QIAA aQFN73

Circuit configuration number 6 for QIAA aQFN73, showing the schematic and the bill of materials.

Table 14. Configuration summary for circuit configuration no. 6
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 6 N/A Battery/Ext. regulator No No No No No
Figure 6. Circuit configuration no. 6 schematic

image/svg+xml 1 1 2 2 3 3 4 4 D D C C B B A A Title Size Project Number Date: File: Sheet of Drawn By: Revision nRF52840-QIAA Ref. Layout (LDO only, VDD supply, No USB) 1.2 12.02.2021 nrf52840_qiaa_var6.SchDoc 1 1 RUBR A4 X1 32MHz C1 12pF C2 12pF C11 100pF XC1 XC2 P0.07 P0.10/NFC2 P0.11 P0.12 P 1 . 0 0 P 0 . 1 8 / R E S E T P 0 . 1 9 P 0 . 2 0 P 0 . 2 1 P 0 . 2 2 P 0 . 2 3 P 1 . 1 0 SWDCLK SWDIO C15 1.0 µ F P1.09 C10 N.C. P0.00/XL1 P0.01/XL2 P 0 . 0 2 / A I N 0 P 0 . 0 3 / A I N 1 VDD_nRF DEC3 P0.04/AIN2 P0.05/AIN3 P0.09/NFC1 C18 12pF C17 12pF X2 32.768kHz Optional P 1 . 1 1 P 1 . 1 2 P 1 . 1 3 P 1 . 1 4 VDD_nRF C7 100nF VDD_nRF C8 100nF P1.01 P1.02 P1.03 P1.04 P1.05 P1.06 P1.07 P 1 . 1 5 P0.08 P1.08 P0.06 P0.26 P0.27 P 0 . 2 4 P 0 . 2 5 P 0 . 1 3 P 0 . 1 4 P 0 . 1 5 P 0 . 1 6 P 0 . 1 7 C12 100nF VDD_nRF C13 N.C. P 0 . 2 8 / A I N 4 P 0 . 2 9 / A I N 5 P 0 . 3 0 / A I N 6 P 0 . 3 1 / A I N 7 C6 4.7 µ F DEC4_6 D E C 4 _ 6 C5 100nF VDD_nRF DEC1 C14 1.0 µ F C3 0.8pF L1 4.7nH RF C4 0.5pF C22 N.C. DEC1 C1 VDD W1 VSS_PA F23 ANT H23 DEC6 E24 DEC3 D23 XC1 B24 XC2 A23 V D D A 2 2 P 1 . 1 0 A 2 0 P0.00/XL1 D2 P0.01/XL2 F2 P 0 . 2 8 / A I N 4 B 1 1 D E C 4 B 5 V S S B 7 V D D B 1 D C C B 3 SWDCLK AA24 SWDIO AC24 P1.01 Y23 D - A D 4 P 0 . 1 9 A C 1 5 nRF52840 VDDH Y2 DCCH AB2 V B U S A D 2 DECUSB AC5 D + A D 6 P 0 . 2 0 A D 1 6 P 0 . 2 1 A C 1 7 P 0 . 2 2 A D 1 8 P 0 . 2 3 A C 1 9 P 0 . 2 4 A D 2 0 VDD AD23 P0.09/NFC1 L24 P1.09 R1 P 0 . 2 5 A C 2 1 P 1 . 0 0 A D 2 2 P0.26 G1 P0.27 H2 P0.04/AIN2 J1 P0.05/AIN3 K2 P0.06 L1 P0.07 M2 P0.08 N1 P1.08 P2 P 0 . 1 3 A D 8 P 0 . 1 4 A C 9 P 0 . 1 5 A D 1 0 P 0 . 1 6 A C 1 1 P0.11 T2 P0.12 U1 P 0 . 1 7 A D 1 2 P 0 . 1 8 / R E S E T A C 1 3 DEC5 N24 P0.10/NFC2 J24 P 0 . 0 3 / A I N 1 B 1 3 P 0 . 0 2 / A I N 0 A 1 2 P 0 . 2 9 / A I N 5 A 1 0 P 0 . 3 0 / A I N 6 B 9 P 0 . 3 1 / A I N 7 A 8 V D D A D 1 4 P1.02 W24 P1.03 V23 P1.04 U24 P1.05 T23 P1.06 R24 P1.07 P23 P 1 . 1 1 B 1 9 P 1 . 1 2 B 1 7 P 1 . 1 3 A 1 6 P 1 . 1 4 B 1 5 P 1 . 1 5 A 1 4 D E C 2 A 1 8 G N D 7 4 U1 nRF52840-QIAA Not required for Fxx and later C9 820pF
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 15. Bill of material for circuit configuration no. 6
Designator Value v1.0 Value v1.1 Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0402
C3 1 pF 0.8 pF Capacitor, NP0, ±10% 0402
C4 1 pF 0.5 pF Capacitor, NP0, ±10% 0402
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0402
C6 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, NP0, ±5%

Not required for Fxx and later

 0402
C10, C13, C22 N.C. Not mounted 0402
C11 100 pF Capacitor, NP0, ±5% 0402
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
L1 3.9 nH 4.7 nH High frequency chip inductor ±5% 0402
U1 nRF52840-QIAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip AQFN-73
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 3215, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_3215

Circuit configuration no. 7 for QIAA aQFN73

Circuit configuration number 7 for QIAAaQFN73, showing the schematic and the bill of materials.

This circuit configuration includes a four-component RF match for improved harmonic suppression when using RADIO with TXPOWER ≥ 5 dBm.

Table 16. Configuration summary for circuit configuration no. 7
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 7 Battery/Ext. regulator N/A Yes Yes Yes Yes No
Figure 7. Circuit configuration no. 7 schematic for QIAA aQFN73

image/svg+xml 1 1 2 2 3 3 4 4 D D C C B B A A Title Size Project Number Date: File: Sheet of Drawn By: Revision nRF52840-QIAA Ref. Layout (4-Component match) 1.1 12.02.2021 nrf52840_qiaa_var7.SchDoc 1 1 RUBR A4 X1 32MHz C1 12pF C2 12pF C11 100pF C20 4.7 µ F XC1 XC2 P0.07 P0.10/NFC2 P0.11 P0.12 P 1 . 0 0 P 0 . 1 8 / R E S E T P 0 . 1 9 P 0 . 2 0 P 0 . 2 1 P 0 . 2 2 P 0 . 2 3 P 1 . 1 0 SWDCLK SWDIO L2 10 µ H C15 1.0 µ F L3 15nH P1.09 C10 N.C. P0.00/XL1 P0.01/XL2 P 0 . 0 2 / A I N 0 P 0 . 0 3 / A I N 1 VBUS VDD_nRF DEC3 P0.04/AIN2 P0.05/AIN3 P0.09/NFC1 C18 12pF C17 12pF X2 32.768kHz Optional P 1 . 1 1 P 1 . 1 2 P 1 . 1 3 P 1 . 1 4 L4 10 µ H VDD_HV VDD_nRF C7 100nF C21 4.7 µ F D + D - VDD_nRF C8 100nF P1.01 P1.02 P1.03 P1.04 P1.05 P1.06 P1.07 P 1 . 1 5 P0.08 P1.08 P0.06 P0.26 P0.27 P 0 . 2 4 P 0 . 2 5 P 0 . 1 3 P 0 . 1 4 P 0 . 1 5 P 0 . 1 6 P 0 . 1 7 C12 100nF VDD_nRF C13 N.C. P 0 . 2 8 / A I N 4 P 0 . 2 9 / A I N 5 P 0 . 3 0 / A I N 6 P 0 . 3 1 / A I N 7 C19 4.7 µ F C6 4.7 µ F VEXT C16 47nF DEC4_6 D E C 4 _ 6 C5 100nF VDD_nRF DEC1 C14 1.0 µ F DEC1 C1 VDD W1 VSS_PA F23 ANT H23 DEC6 E24 DEC3 D23 XC1 B24 XC2 A23 V D D A 2 2 P 1 . 1 0 A 2 0 P0.00/XL1 D2 P0.01/XL2 F2 P 0 . 2 8 / A I N 4 B 1 1 D E C 4 B 5 V S S B 7 V D D B 1 D C C B 3 SWDCLK AA24 SWDIO AC24 P1.01 Y23 D - A D 4 P 0 . 1 9 A C 1 5 nRF52840 VDDH Y2 DCCH AB2 V B U S A D 2 DECUSB AC5 D + A D 6 P 0 . 2 0 A D 1 6 P 0 . 2 1 A C 1 7 P 0 . 2 2 A D 1 8 P 0 . 2 3 A C 1 9 P 0 . 2 4 A D 2 0 VDD AD23 P0.09/NFC1 L24 P1.09 R1 P 0 . 2 5 A C 2 1 P 1 . 0 0 A D 2 2 P0.26 G1 P0.27 H2 P0.04/AIN2 J1 P0.05/AIN3 K2 P0.06 L1 P0.07 M2 P0.08 N1 P1.08 P2 P 0 . 1 3 A D 8 P 0 . 1 4 A C 9 P 0 . 1 5 A D 1 0 P 0 . 1 6 A C 1 1 P0.11 T2 P0.12 U1 P 0 . 1 7 A D 1 2 P 0 . 1 8 / R E S E T A C 1 3 DEC5 N24 P0.10/NFC2 J24 P 0 . 0 3 / A I N 1 B 1 3 P 0 . 0 2 / A I N 0 A 1 2 P 0 . 2 9 / A I N 5 A 1 0 P 0 . 3 0 / A I N 6 B 9 P 0 . 3 1 / A I N 7 A 8 V D D A D 1 4 P1.02 W24 P1.03 V23 P1.04 U24 P1.05 T23 P1.06 R24 P1.07 P23 P 1 . 1 1 B 1 9 P 1 . 1 2 B 1 7 P 1 . 1 3 A 1 6 P 1 . 1 4 B 1 5 P 1 . 1 5 A 1 4 D E C 2 A 1 8 G N D 7 4 U1 nRF52840-QIAA RF L1 4.7nH L5 2.2nH C3 1.0pF C4 1.2pF Not required for Fxx and later C9 820pF
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 17. Bill of material for circuit configuration no. 7
Designator Value Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0402
C3 1 pF Capacitor, NP0, ±5% 0402
C4 1.2 pF Capacitor, NP0, ±5% 0402
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0402
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, NP0, ±5%

Not required for Fxx and later

 0402
C10, C13 N.C. Not mounted 0402
C11 100 pF Capacitor, NP0, ±5% 0402
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C16 47 nF Capacitor, X7R, ±10% 0402
C19, C21 4.7 µF Capacitor, X7S, ±10% 0603
L1 4.7 nH High frequency chip inductor ±5% 0402
L2 10 µH Chip inductor, IDC, min = 50 mA, ±20% 0603
L3 15 nH High frequency chip inductor ±10% 0402
L4 10 µH Chip inductor, IDC, min = 80 mA, ±20% 0603
L5 2.2 nH High frequency chip inductor ±5% 0402
U1 nRF52840-QIAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip AQFN-73
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 3215, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_3215

Circuit configuration no. 1 for QFAA QFN48

Circuit configuration number 1 for QFAA QFN48, showing the schematic and the bill of materials.

Table 18. Configuration summary for circuit configuration no. 1
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 1 N/A Battery/Ext. regulator N/A N/A Yes N/A No
Figure 8. Circuit configuration no. 1 schematic


Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 19. Bill of material for circuit configuration no. 1
Designator Value Description Footprint
C1, C2, C16, C17 12 pF Capacitor, NP0, ±2% 0201
C3 1.0 pF Capacitor, NP0, ±10% 0201
C4 1.2 pF Capacitor, NP0, ±10% 0201
C5, C6, C7, C8, C12 100 nF Capacitor, X5R, ±10% 0201
C10 N.C. Not mounted 0201
C11 100 pF Capacitor, NP0, ±5% 0201
C13, C14 1.0 µF Capacitor, X5R, ±10% 0402
C15 47 nF Capacitor, X5R, ±10% 0201
L1 4.7 nH High frequency chip inductor ±5% 0201
L2 2.2 nH High frequency chip inductor ±5% 0201
L3 10 µH Chip inductor, IDC, min = 50 mA, ±20% 0603
L4 15 nH High frequency chip inductor ±10% 0402
U1 nRF52840-QFAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip QFN48
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±30 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012

Circuit configuration no. 1 for CKAA WLCSP

Circuit configuration number 1 for CKAA WLCSP, showing the schematic and the bill of materials.

Table 20. Configuration summary for circuit configuration no. 1
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 1 USB (VDDH = VBUS) N/A Yes No No Yes No
Figure 9. Circuit configuration no. 1 schematic for CKAA WLCSP
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 21. Bill of material for circuit configuration no. 1
Designator Value Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0201
C3 1.0 pF Capacitor, NP0, ±5% 0201
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0201
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, X7R, ±10%

Not required for Fxx and later

 0201
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C19 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH High frequency chip inductor ±5% 0201
L5 4.7 nH High frequency chip inductor ±5% 0201
R1 2R2 Resistor, ±1%, 0.05W 0201
U1 nRF52840-CKAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip WLCSP-94
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012

Circuit configuration no. 2 for CKAA WLCSP

Circuit configuration number 2 for CKAA WLCSP, showing the schematic and the bill of materials.

Table 22. Configuration summary for circuit configuration no. 2
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 2 Battery/Ext. regulator N/A Yes No No Yes No
Figure 10. Circuit configuration no. 2 schematic for CKAA WLCSP
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 23. Bill of material for circuit configuration no. 2
Designator Value Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0201
C3 1.0 pF Capacitor, NP0, ±5% 0201
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0201
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, X7R, ±10%

Not required for Fxx and later

 0201
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C19, C21 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH High frequency chip inductor ±5% 0201
L5 4.7 nH High frequency chip inductor ±5% 0201
U1 nRF52840-CKAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip WLCSP-94
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012

Circuit configuration no. 3 for CKAA WLCSP

Circuit configuration number 3 for CKAA WLCSP, showing the schematic and the bill of materials.

Table 24. Configuration summary for circuit configuration no. 3
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 3 N/A Battery/Ext. regulator No No No Yes No
Figure 11. Circuit configuration no. 3 schematic for CKAA WLCSP
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 25. Bill of material for circuit configuration no. 3
Designator Value Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0201
C3 1.0 pF Capacitor, NP0, ±5% 0201
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0201
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, X7R, ±10%

Not required for Fxx and later

 0201
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C21 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH High frequency chip inductor ±5% 0201
L5 4.7 nH High frequency chip inductor ±5% 0201
U1 nRF52840-CKAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip WLCSP-94
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012

Circuit configuration no. 4 for CKAA WLCSP

Circuit configuration number 4 for CKAA WLCSP, showing the schematic and the bill of materials.

Table 26. Configuration summary for circuit configuration no. 4
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 4 Battery/Ext. regulator N/A Yes Yes Yes Yes No
Figure 12. Circuit configuration no. 4 schematic for CKAA WLCSP
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 27. Bill of material for circuit configuration no. 4
Designator Value Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0201
C3 1.0 pF Capacitor, NP0, ±5% 0201
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0201
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, X7R, ±10%

Not required for Fxx and later

 0201
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C16 47 nF Capacitor, X7R, ±10% 0201
C19, C21 4.7 µF Capacitor, X7S, ±10% 0603
L1 3.9 nH High frequency chip inductor ±5% 0201
L2 10 µH Chip inductor, IDC, min = 50 mA, ±20% 0603
L3 15 nH High frequency chip inductor ±10% 0402
L4 10 µH Chip inductor, IDC, min = 80 mA, ±10% 0603
L5 4.7 nH High frequency chip inductor ±5% 0201
U1 nRF52840-CKAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip WLCSP-94
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012

Circuit configuration no. 5 for CKAA WLCSP

Circuit configuration number 5 for CKAA WLCSP, showing the schematic and the bill of materials.

Table 28. Configuration summary for circuit configuration no. 5
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 5 N/A Battery/Ext. regulator No No Yes Yes Yes
Figure 13. Circuit configuration no. 5 schematic for CKAA WLCSP
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 29. Bill of material for circuit configuration no. 5
Designator Value Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0201
C3 1.0 pF Capacitor, NP0, ±5% 0201
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0201
C6, C20 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, X7R, ±10%

Not required for Fxx and later

 0201
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
C16 47 nF Capacitor, X7R, ± 10% 0201
C21 4.7 µF Capacitor, X7S, ± 10% 0603
CT1, CT2, CT3, CT4 Antenna dependent Capacitor, X7R, ± 10% 0201
L1 3.9 nH High frequency chip inductor ±5% 0201
L2 10 µH Chip inductor, IDC, min = 50 mA, ±20% 0603
L3 15 nH High frequency chip inductor ±10% 0402
L5 4.7 nH High frequency chip inductor ±5% 0201
U1 nRF52840-CKAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip WLCSP-94
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012

Circuit configuration no. 6 for CKAA WLCSP

Circuit configuration number 6 for CKAA WLCSP, showing the schematic and the bill of materials.

Table 30. Configuration summary for circuit configuration no. 6
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDCEN0 DCDCEN1 USB NFC
Config. 6 N/A Battery/Ext. regulator No No No No No
Figure 14. Circuit configuration no. 6 schematic for CKAA WLCSP
Note: For PCB reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.
Table 31. Bill of material for circuit configuration no. 6
Designator Value Description Footprint
C1, C2, C17, C18 12 pF Capacitor, NP0, ±2% 0201
C3 1.0 pF Capacitor, NP0, ±5% 0201
C5, C7, C8, C12 100 nF Capacitor, X7R, ±10% 0201
C6 4.7 µF Capacitor, X7R, ±10% 0603
C9 820 pF

Capacitor, X7R, ±10%

Not required for Fxx and later

 0201
C14, C15 1.0 µF Capacitor, X7R, ±10% 0603
L1 3.9 nH High frequency chip inductor ±5% 0201
L5 4.7 nH High frequency chip inductor ±5% 0201
U1 nRF52840-CKAA Multiprotocol Bluetooth low energy, IEEE 802.15.4, ANT, and 2.4 GHz proprietary System on Chip WLCSP-94
X1 32 MHz XTAL SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±40 ppm XTAL_2016
X2 32.768 kHz XTAL SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012

PCB guidelines

A well designed PCB is necessary to achieve good RF performance. Poor layout can lead to loss in performance or functionality.

A qualified RF layout for the IC and its surrounding components, including matching networks, can be downloaded from www.nordicsemi.com.

To ensure optimal performance it is essential that you follow the schematics and layout references closely. Especially in the case of the antenna matching circuitry (components between device pin ANT and the antenna), any changes to the layout can change the behavior, resulting in degradation of RF performance or a need to change component values. All reference circuits are designed for use with a 50 Ω single-ended antenna.

A PCB with a minimum of two layers, including a ground plane, is recommended for optimal RF performance. On PCBs with more than two layers, put a keep-out area on the inner layers directly below the antenna matching circuitry (components between device pin ANT and the antenna) to reduce the stray capacitances that influence RF performance.

A matching network is needed between the RF pin ANT and the antenna, to match the antenna impedance (normally 50 Ω) to the optimum RF load impedance for the chip. For optimum performance, the impedance for the matching network should be set as described in the recommended aQFN™73 package reference circuitry from Circuit configuration no. 1 for QIAA aQFN73, the recommended QFN48 reference circuitry from Circuit configuration no. 1 for QFAA QFN48, or the recommended WLCSP reference circuitry from Circuit configuration no. 1 for CKAA WLCSP depending on the package variant used in your design.

The DC supply voltage should be decoupled as close as possible to the VDD pins with high performance RF capacitors. See the schematics for recommended decoupling capacitor values. The supply voltage for the chip should be filtered and routed separately from the supply voltages of any digital circuitry.

Long power supply lines on the PCB should be avoided. All device grounds, VDD connections, and VDD bypass capacitors must be connected as close as possible to the IC. For a PCB with a topside RF ground plane, the VSS pins should be connected directly to the ground plane. For a PCB with a bottom ground plane, the best technique is to have via holes as close as possible to the VSS pads. A minimum of one via hole should be used for each VSS pin.

Fast switching digital signals should not be routed close to the crystal or the power supply lines. Capacitive loading of fast switching digital output lines should be minimized in order to avoid radio interference. Avoid routing the 32MHz crystal lines close to antenna line and antenna ground.

PCB layout example

The PCB layout shown in the following figures is a reference layout for the aQFN™ package with internal LDO setup and VBUS supply.

Note: Pay attention to how the capacitor C3 is grounded. It is not directly connected to the ground plane, but grounded via VSS_PA pin F23. This is done to create additional filtering of harmonic components.

For all available reference layouts, see the product page for the nRF52840 on www.nordicsemi.com.

Figure 15. Top silk layer


Figure 16. Top layer


Figure 17. Mid layer 1


Figure 18. Mid layer 2


Figure 19. Bottom layer


Note: No components in bottom layer.

PMIC support

The nRF52 Series is comprehensively supported by Nordic Semiconductor's own range of PMICs (Power Management Integrated Circuits). These PMICs are meticulously designed to enhance the performance and efficiency of the nRF52 Series devices. This integration ensures the longest battery life and the highest reliability for the end application. The synergy between the nRF52 Series and the Nordic PMICs highlights Nordic Semiconductor's commitment to providing a complete and cohesive solution for their customers' needs in wireless technology applications.