The following application example uses nPM1300 and an nRF5x Bluetooth® Low Energy System on Chip (SoC). For other configurations, see Reference circuitry.

The example application is for a design with the following configuration and features:
  • BUCK, LOADSW, and LDO are in use
  • Host software controls the device through TWI, the interrupt on GPIO1, and RESET on the GPIO0 pin
  • Three LEDs available
  • Battery pack with NTC thermistor
  • Ship mode
  • Low battery indication LED

Schematic

Figure 1. Application example

Supplying from BUCK

An application must not be supplied directly from VBAT. This can interrupt the battery charging process causing unwanted behavior from the charger. Use either VOUT1, VOUT2, or VSYS to supply the application.

BUCK1 starts automatically and supplies the nRF5x host SoC with 1.8 V. BUCK1 is the I/O voltage for the system. BUCK2 starts automatically with 3 V output voltage for other application features.

USB port negotiation

nRF5x can connect to a USB host.

Port negotiation is performed after nPM1300 port detection. The nRF5x device and nPM1300 are both connected to USB-C in the application example.
  • The D+ and D- pins are connected to nRF5x. The CC1 and CC2 pins are connected to nPM1300. The nRF5x SoC must wait until nPM1300 completes port detection using the USB configuration channel.
  • The nRF5x device must set the correct current limit as described in Charge current limit (ICHG).
  • VBUS is supplied to SYSREG on nPM1300 and VBUSOUT supplies the nRF5x VBUS input.
VBUSOUT is only for host sensing and should not be used as a source.

Charging and error states

Three LEDs can be used for charging indicators or general purpose by the application.

Termination voltage and current

The termination voltage, VTERM, is configured through TWI up to 4.45 V.

Charge current is configured through TWI.

NTC thermistor configuration

The NTC pin connects to an external NTC thermistor. Place the NTC thermistor with thermal coupling on the battery pack.

Ship mode

Ship mode is enabled at production time through the TWI interface.

SHPHLD is connected to SW2 and is in the circuit to exit Ship mode. If another circuit is present instead of a button, any signal that is able to pull the SHPHLD pin low for the required period can be connected to that net. See Ship and Hibernate modes for more information.