nRF54LC10A Preliminary Datasheet

• nRF54LC10A Preliminary Datasheet v0.6 [PDF]

nRF54LC10A is part of the nRF54L Series of wireless System-on-Chips (SoCs). Every device in the series integrates an ultra-low power 2.4 GHz radio with MCU (Microcontroller Unit) functionality featuring a 128 MHz Arm® Cortex®-M33 processor.

nRF54LC10A is designed for applications requiring multiprotocol radio and only an essential peripheral set such as asset trackers, tags, radio coprocessor in larger systems, or 802.15.4 networked sensor nodes. For devices with enclosed batteries, the system hibernation mode extends shelf life.

Nordic Semiconductor's proprietary technologies, such as low-leakage RAM and advanced multiprotocol radio design, enable ultra-low power consumption, reducing battery size or extending battery life.

Designed with versatility in mind, the nRF54L Series SoCs enable a broad range of applications. The multiprotocol 2.4 GHz radio supports Bluetooth® LE with optional features including Channel Sounding introduced in Bluetooth Core 6.0, as well as 802.15.4-2020 for standards such as Thread®, Matter, and Zigbee®, and a proprietary 2.4 GHz mode supporting up to 4 Mbps for higher throughput.

nRF54LC10A is available in two 1.9x2.3 mm CSP packages for demanding, size-constrained products, and a QFN package.

Radio Bluetooth LE LE 2M, LE 1M, LE Coded Channel Sounding IEEE 802.15.4-2020 – 250 kbps 2.4 GHz proprietary GFSK 4 Mbps, 2 Mbps, 1 Mbps Single-ended antenna output (on-chip balun) 128-bit AES/ECB/CCM/AAR coprocessor Configurable TX power with 1 dBm step size from -10 dBm to maximum Processor 128 MHz Arm Cortex-M33 CPU FPU, DSP, MPU, TrustZone Debug – SWD, ETM, ITM, DWT, CTI, Up to 8 MHz TPIU Memory 1012 KB NVM (RRAM) 192 KB RAM Coprocessor 128 MHz RISC-V coprocessor (VPR)

Peripherals Three fully featured serial interfaces with EasyDMA, supporting I2C, SPI controller/peripheral, and UART SPI up to 8 MHz (SPIM, SPIS) TWI up to 400 kHz and I2C compatible (TWIM, TWIS) UART up to 1 Mbps (UARTE) SAADC with eight channels 14-bit at 31.25 ksps (oversampled) 12-bit at 125 ksps (oversampled) 10-bit at up to 1 Msps Global RTC can run in System OFF mode and implement a shared system timer (GRTC) Two individual watchdog timers for secure and non-secure context (WDT) Seven 32-bit timers with counter mode (TIMER) Temperature sensor (TEMP) Comparator and low-power comparator with wake-up from System OFF mode (COMP, LPCOMP)

GPIO Up to 31 GPIO pins 8 MHz ports Power supply and clock Single-inductor DC/DC converter System hibernation mode (<50nA) for shipping and storage Single 32 MHz crystal operation Optional 32.768 kHz crystal Security Arm TrustZone, Root of Trust, secure boot, secure storage Security components – Cryptographic engine (CRACEN), Key management (KMU) Physical protection – Tamper detectors (TAMPC, GLITCHDET), Side-channel protection Key specifications 4 dBm maximum TX power -97 dBm RX sensitivity for 1 Mbps Bluetooth LE -101 dBm RX sensitivity for IEEE 802.15.4 503 CoreMark®, 3.93 CoreMark/MHz EEMBC CoreMark executing from non-volatile memory Supply and GPIO voltage – 1.7 V to 3.6 V -40°C to +85°C operating temperature Packages CSP29 (CAAA) with 12 GPIO pins 1.93x2.29 mm with 0.35 mm pitch CSP39 (CBAA) with 20 GPIO pins 1.93x2.29 mm with 0.3 mm pitch QFN48 (QFAA) with 31 GPIO pins 6x6 mm with 0.4 mm pitch