VBUS supplies the input voltage to the system voltage regulator (SYSREG) . VBUS voltage is supplied by AC wall adapters or USB ports.
SYSREG is a linear voltage regulator (LDO) that supplies VINT.
- 5 V linear voltage regulator (LDO) supplying VINT when VBUS is connected
- Operating voltage up to 6.7 V
- Overvoltage protection to 20 V
- USB port detection and control pin for setting the current limit on VBUS
USB port detection and VBUS current limiting
The device supports automatic detection of USB port type in line with the Battery Charging Specification v1.2 found on usb.org.
Primary detection is performed for Standard Downstream Port (SDP), Dedicated Charging Port (DCP), and Charging Downstream Port (CDP) USB ports. The detection sequence starts once VBUS is connected, and completes after TCONN0 .
If SDP is detected, the VBUS current limit is set to 100 mA. An external microcontroller with a USB interface can negotiate a 500 mA limit with the USB host. It then raises the VBUS current limit using a GPIO to control ISET. This is referred to as USB port negotiation.
If DCP/CDP is detected, the VBUS current limit is set to 500 mA. In this case, ISET configuration is ignored.
It is possible to configure the device to set the VBUS current limit to either 100 mA or 500 mA using ISET and disabling USB port detection.
The following table describes ISET, D+, and D- configurations to fix VBUS current limit or set VBUS current limit based on either USB port detection or USB port negotiation.
| Limit set method | Pin configuration | VBUS current limit |
|---|---|---|
| Fixed 100 mA |
ISET = D- = AVSS D+ = NC |
100 mA |
| Fixed 500 mA |
ISET = VSYS D- = AVSS D+ = NC |
500 mA |
| USB port detection |
ISET = AVSS D+ and D- are connected to host |
100 mA if SDP detected 500 mA if DCP/CDP detected |
| USB port detection and negotiation (requires a USB enabled microcontroller) |
ISET = microcontroller GPIO D+ and D- connected to USB host |
100 mA if SDP detected, ISET = LOW 500 mA if SDP detected, ISET = HIGH 500 mA if DCP/CDP |
When a microcontroller uses GPIO to control ISET for USB port negotiation, ISET must be set LOW on reset and when USB is disconnected. ISET is only set HIGH when the USB port is SDP and negotiation for a higher current limit is complete.
See the circuit schematics in the Reference circuitry for designs illustrating these configurations.
SYSREG resistance and output voltage
VBUS overvoltage and undervoltage protection
VBUS disconnect
SYSREG isolates VBUS from VINT when VBUS is disconnected and the voltage drops below VBUSMIN.
When VBUS reaches VBUSULP, the device enters an ultra-low power (ULP) operation state. This takes TDISCONN, dependent on capacitive load on VBUS. The device stays in a ULP state while VBUS is under VBUSULP.
Electrical specification
| Symbol | Description | Min. | Typ. | Max. | Units |
|---|---|---|---|---|---|
| IBUSLIM1 | Max VBUS input current, CDP/DCP USB or ISET = HIGH | 450 | - | 500 | mA |
| IBUSLIM0 | Max VBUS input current, SDP USB and ISET = LOW, 25°C | 90 | - | 100 | mA |
| IBUSQ | Quiescent current taken from VBUS, no charging, no load on VSYS, VBUS = 5 V | 2 | mA | ||
| VINTREG | Regulated VINT voltage from SYSREG, VBUS = 6 V | 5.2 | V | ||
| RONREG | SYSREG on resistance, ISET = HIGH | - | 440 | 720 | mΩ |
| VBUSOVP | Overvoltage protection threshold | 6.9 | V | ||
| VBUSMIN | Undervoltage threshold | 3.9 | V | ||
| VBUSULP | Threshold for entering ULP mode | 1.8 | V | ||
| VBUSPOR | Power-on reset release voltage for VBUS | 3.9 | V | ||
| VBUSBOR | Brownout reset trigger voltage for VBUS1 | 3.8 | V | ||
| TCONN0 | Time for USB detection, ISET = LOW | - | 700 | ms | |
| TCONN1 | Time for VINT to settle after VBUS connection, ISET = HIGH, no load | - | 1.2 | ms | |
| TDISCONN | Time for system to reach ULP mode after VBUS disconnect, CVBUS = 10 µF | - | 110 | ms |
1Device enters BOR only if (V(VBUS) < VBUSBOR) AND (V(VBAT) < VBATBOR).
Electrical characteristics
The following graphs show SYSREG electrical characteristics.