The glossary contains terms and acronyms that are used in this document.
Access Port Protection (APPROTECT)
A register used to prevent read and write access to all CPU registers and memory-mapped addresses.
APPROTECT
Control Access Port (CTRL-AP)
A custom access port that enables control of the device even if other access ports in
the debug access port are disabled by the access port protection.
CTRL-AP
Debug Access Port (DAP)
Provides multiple master driving ports, all accessible and controlled through a single
external interface port to provide system-wide debug.
DAP
Device Firmware Update (DFU)
A mechanism for upgrading the firmware of a device.
DFU
Development Kit (DK)
A hardware development platform used for application development.
DK
Erase Protection (ERASEPROTECT)
A register used to block NVMC ERASEALL, RRAMC ERASEALL, and CTRL-AP.ERASEALL
functionality.
ERASEPROTECT
Factory Information Configuration Registers (FICR)
Pre-programmed registers that contain chip-specific information and configuration.
FICRs cannot be erased by users.
FICR
International Mobile (Station) Equipment Identity (IMEI)
A unique code consisting of 14 digits and a check digit for identifying 3GPP-based
mobile devices.
IMEI
Non-volatile Memory Controller (NVMC)
A controller used for writing and erasing the internal flash memory and the
User Information Configuration Registers (UICR).
NVMC
Production Test Image (PTI)
A modem firmware version used in the device manufacturing phase.
PTI
Resistive Random-Access Memory Controller (RRAMC)
A controller used for writing and erasing the non-volatile memory and the
UICR.
RRAMC
Secure Access Port Protection (SECUREAPPROTECT)
A register used to prevent read and write access to all secure CPU registers and secure memory-mapped addresses.
SECUREAPPROTECT
Serial Wire Debug (SWD)
A standard two-wire interface for programming and debugging Arm® CPUs.
SWD
Serial Wire Debug Port (SW-DP)
An interface that provides a low pin count bi-directional connection to the DAP with a reference clock signal for synchronous operation.
System on Chip (SoC)
A microchip that integrates all the necessary electronic circuits and components of a
computer or other electronic systems on a single integrated circuit.
SoC
System Protection Unit (SPU)
The central point in the system that controls access to memories, peripherals, and
other resources.
SPU
Type Allocation Code (TAC)
The initial eight-digit part of an International Mobile (Station) Equipment Identity
(IMEI) code used for identifying the model of a mobile phone.
TAC
User Information Configuration Registers (UICR)
Non-volatile memory registers used to configure user-specific settings.
UICR
Watchdog timer (WDT)
A timer that causes a system reset if it is not poked periodically.