The nRF54LM20 DK has a 64 Mb external flash memory that can be connected to the nRF54LM20B SoC. The memory is a multi-I/O memory supporting both Serial Peripheral Interface (SPI) and Quad Serial Peripheral Interface (QSPI).
By default, the VDD:IO domain powers external memory. The power to the external memory can be configured to come from the VDD:nRF domain instead by cutting SB23 and shorting SB24. If VDD:nRF is selected, the power consumption of the external memory is added to the nRF54LM20B SoC current measured on P14. See the following figure and table for more information.
| Power source | Solder bridge | Default state |
|---|---|---|
| VDD:IO | SB23 | Closed |
| VDD:nRF | SB24 | Open |
GPIOs P2.00–P2.05 can be enabled as QSPI signals for the external flash. Switches between the System on Chip (SoC) and the external flash determines if the GPIOs connect to the external flash or act as regular GPIO signals routed to pin headers P4 and P17. The state of the switches is controlled by the board controller.