Recommended operating conditions

nPM1304 Datasheet

  • nPM1304 Datasheet
  • Revision history
  • About this document
  • Product overview
  • Absolute maximum ratings
  • Recommended operating conditions
  • Core Components
  • SYSREG — System regulator
  • CHARGER — Battery charger
  • BUCK — Buck regulators
  • LOADSW/LDO — Load switches/LDO regulators
  • LEDDRV — LED drivers
  • GPIO — General purpose input/output
  • System features
  • System Monitor
  • POF — Power-fail comparator
  • TIMER — Timer/monitor
  • Ship and Hibernate modes
  • RESET — Reset control
  • TWI — I2C compatible two-wire interface
  • TWI timing diagram
  • Electrical specification
  • Event, interrupt and revision registers
  • Reset and error registers
  • Application
  • Hardware and layout
  • Pin assignments
  • Mechanical specifications
  • Reference circuitry
  • Ordering information
  • Legal notices

The operating conditions are the physical parameters that the chip can operate within.

Table 1. Recommended operating conditions
Symbol Description Min. Max Unit
VBUSOP Supply voltage 4.0 5.5 V
VBATOP Battery voltage 2.3 4.65 V
VDDIO I/O supply voltage 1.7 VSYS V
TJ Junction temperature -40 +125 °C
TA Ambient temperature -40 +85 °C
Note: Any system features powered by VSYS will only operate when the VSYS voltage > VSYSPOF.

Dissipation ratings

Thermal resistances and thermal characterization parameters as defined by JESD51-7 are shown in the following tables.

Table 2. QFN32 thermal resistance and characterization parameters
Symbol Parameter QFN 32 pins Units
RϴJA Junction-to-ambient thermal resistance 24.2 °C/W
RϴJC(top) Junction-to-case (top) thermal resistance 10.7 °C/W
RϴJB Junction-to-board thermal resistance 8.8 °C/W
ΨJT Junction-to-top characterization parameter 0.15 °C/W
ΨJB Junction-to-board characterization parameter 8.9 °C/W
Table 3. CSP thermal resistance and characterization parameters
Symbol Parameter CSP 35 pins Units
RϴJA Junction-to-ambient thermal resistance 48.3 °C/W
RϴJC(top) Junction-to-case (top) thermal resistance 6.0 °C/W
RϴJB Junction-to-board thermal resistance 23.0 °C/W
ΨJT Junction-to-top characterization parameter 0.5 °C/W
ΨJB Junction-to-board characterization parameter 23.4 °C/W

CSP light sensitivity

The CSP package is sensitive to light.

All CSP package variants are sensitive to visible and close-range infrared light. The final product design must shield the chip through encapsulation or shielding/coating the CSP device.

CSP package variant CAAA has a backside coating that covers the marking side of the device with a light absorbing film. The side edges and the ball side of the device are still exposed and need to be protected.

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