Hardware access layer for accessing the QSPI peripheral. More...

Data Structures
struct	nrf_qspi_pins_t
	Pins configuration. More...

struct	nrf_qspi_cinstr_conf_t
	Custom instruction configuration. More...

struct	nrf_qspi_addrconfig_conf_t
	Addressing mode register configuration. See nrf_qspi_addrconfig_set . More...

struct	nrf_qspi_prot_conf_t
	Structure with QSPI protocol interface configuration. More...

struct	nrf_qspi_phy_conf_t
	QSPI physical interface configuration. More...

Macros
#define	NRF_QSPI_PIN_NOT_CONNECTED 0xFF
	This value can be used as a parameter for the nrf_qspi_pins_set function to specify that a given QSPI signal (SCK, CSN, IO0, IO1, IO2, or IO3) will not be connected to a physical pin.

#define	NRF_QSPI_PIN_VAL (pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin)
	Macro for setting proper values to pin registers.

Enumerations
enum	nrf_qspi_task_t { NRF_QSPI_TASK_ACTIVATE = offsetof(NRF_QSPI_Type, TASKS_ACTIVATE), NRF_QSPI_TASK_READSTART = offsetof(NRF_QSPI_Type, TASKS_READSTART), NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART) }
	QSPI tasks. More...

enum	nrf_qspi_event_t { NRF_QSPI_EVENT_READY = offsetof(NRF_QSPI_Type, EVENTS_READY) }
	QSPI events. More...

enum	nrf_qspi_int_mask_t { NRF_QSPI_INT_READY_MASK = QSPI_INTENSET_READY_Msk }
	QSPI interrupts. More...

enum	nrf_qspi_frequency_t { NRF_QSPI_FREQ_32MDIV1 , NRF_QSPI_FREQ_32MDIV2 , NRF_QSPI_FREQ_32MDIV3 , NRF_QSPI_FREQ_32MDIV4 , NRF_QSPI_FREQ_32MDIV5 , NRF_QSPI_FREQ_32MDIV6 , NRF_QSPI_FREQ_32MDIV7 , NRF_QSPI_FREQ_32MDIV8 , NRF_QSPI_FREQ_32MDIV9 , NRF_QSPI_FREQ_32MDIV10 , NRF_QSPI_FREQ_32MDIV11 , NRF_QSPI_FREQ_32MDIV12 , NRF_QSPI_FREQ_32MDIV13 , NRF_QSPI_FREQ_32MDIV14 , NRF_QSPI_FREQ_32MDIV15 , NRF_QSPI_FREQ_32MDIV16 }
	QSPI frequency divider values. More...

enum	nrf_qspi_readoc_t { NRF_QSPI_READOC_FASTREAD = QSPI_IFCONFIG0_READOC_FASTREAD, NRF_QSPI_READOC_READ2O = QSPI_IFCONFIG0_READOC_READ2O, NRF_QSPI_READOC_READ2IO = QSPI_IFCONFIG0_READOC_READ2IO, NRF_QSPI_READOC_READ4O = QSPI_IFCONFIG0_READOC_READ4O, NRF_QSPI_READOC_READ4IO = QSPI_IFCONFIG0_READOC_READ4IO }
	Interface configuration for a read operation. More...

enum	nrf_qspi_writeoc_t { NRF_QSPI_WRITEOC_PP = QSPI_IFCONFIG0_WRITEOC_PP, NRF_QSPI_WRITEOC_PP2O = QSPI_IFCONFIG0_WRITEOC_PP2O, NRF_QSPI_WRITEOC_PP4O = QSPI_IFCONFIG0_WRITEOC_PP4O, NRF_QSPI_WRITEOC_PP4IO = QSPI_IFCONFIG0_WRITEOC_PP4IO }
	Interface configuration for a write operation. More...

enum	nrf_qspi_addrmode_t { NRF_QSPI_ADDRMODE_24BIT = QSPI_IFCONFIG0_ADDRMODE_24BIT, NRF_QSPI_ADDRMODE_32BIT = QSPI_IFCONFIG0_ADDRMODE_32BIT }
	Interface configuration for addressing mode. More...

enum	nrf_qspi_spi_mode_t { NRF_QSPI_MODE_0 = QSPI_IFCONFIG1_SPIMODE_MODE0, NRF_QSPI_MODE_1 = QSPI_IFCONFIG1_SPIMODE_MODE3 }
	QSPI SPI mode. Polarization and phase configuration. More...

enum	nrf_qspi_addrconfig_mode_t { NRF_QSPI_ADDRCONF_MODE_NOINSTR = QSPI_ADDRCONF_MODE_NoInstr, NRF_QSPI_ADDRCONF_MODE_OPCODE = QSPI_ADDRCONF_MODE_Opcode, NRF_QSPI_ADDRCONF_MODE_OPBYTE0 = QSPI_ADDRCONF_MODE_OpByte0, NRF_QSPI_ADDRCONF_MODE_ALL = QSPI_ADDRCONF_MODE_All }
	Addressing configuration mode. More...

enum	nrf_qspi_erase_len_t { NRF_QSPI_ERASE_LEN_4KB = QSPI_ERASE_LEN_LEN_4KB, NRF_QSPI_ERASE_LEN_64KB = QSPI_ERASE_LEN_LEN_64KB, NRF_QSPI_ERASE_LEN_ALL = QSPI_ERASE_LEN_LEN_All }
	Erasing data length. More...

enum	nrf_qspi_cinstr_len_t { NRF_QSPI_CINSTR_LEN_1B = QSPI_CINSTRCONF_LENGTH_1B, NRF_QSPI_CINSTR_LEN_2B = QSPI_CINSTRCONF_LENGTH_2B, NRF_QSPI_CINSTR_LEN_3B = QSPI_CINSTRCONF_LENGTH_3B, NRF_QSPI_CINSTR_LEN_4B = QSPI_CINSTRCONF_LENGTH_4B, NRF_QSPI_CINSTR_LEN_5B = QSPI_CINSTRCONF_LENGTH_5B, NRF_QSPI_CINSTR_LEN_6B = QSPI_CINSTRCONF_LENGTH_6B, NRF_QSPI_CINSTR_LEN_7B = QSPI_CINSTRCONF_LENGTH_7B, NRF_QSPI_CINSTR_LEN_8B = QSPI_CINSTRCONF_LENGTH_8B, NRF_QSPI_CINSTR_LEN_9B = QSPI_CINSTRCONF_LENGTH_9B }
	Custom instruction length. More...

Functions
__STATIC_INLINE void	nrf_qspi_task_trigger (NRF_QSPI_Type *p_reg, nrf_qspi_task_t task)
	Function for activating a specific QSPI task. More...

__STATIC_INLINE uint32_t	nrf_qspi_task_address_get (NRF_QSPI_Type const *p_reg, nrf_qspi_task_t task)
	Function for getting the address of a specific QSPI task register. More...

__STATIC_INLINE void	nrf_qspi_event_clear (NRF_QSPI_Type *p_reg, nrf_qspi_event_t qspi_event)
	Function for clearing a specific QSPI event. More...

__STATIC_INLINE bool	nrf_qspi_event_check (NRF_QSPI_Type const *p_reg, nrf_qspi_event_t qspi_event)
	Function for checking the state of a specific SPI event. More...

__STATIC_INLINE uint32_t *	nrf_qspi_event_address_get (NRF_QSPI_Type const *p_reg, nrf_qspi_event_t qspi_event)
	Function for getting the address of a specific QSPI event register. More...

__STATIC_INLINE void	nrf_qspi_int_enable (NRF_QSPI_Type *p_reg, uint32_t qspi_int_mask)
	Function for enabling specified interrupts. More...

__STATIC_INLINE void	nrf_qspi_int_disable (NRF_QSPI_Type *p_reg, uint32_t qspi_int_mask)
	Function for disabling specified interrupts. More...

__STATIC_INLINE bool	nrf_qspi_int_enable_check (NRF_QSPI_Type const *p_reg, nrf_qspi_int_mask_t qspi_int)
	Function for retrieving the state of a given interrupt. More...

__STATIC_INLINE void	nrf_qspi_enable (NRF_QSPI_Type *p_reg)
	Function for enabling the QSPI peripheral. More...

__STATIC_INLINE void	nrf_qspi_disable (NRF_QSPI_Type *p_reg)
	Function for disabling the QSPI peripheral. More...

__STATIC_INLINE void	nrf_qspi_pins_set (NRF_QSPI_Type p_reg, const nrf_qspi_pins_t p_pins)
	Function for configuring QSPI pins. More...

__STATIC_INLINE void	nrf_qspi_ifconfig0_set (NRF_QSPI_Type p_reg, const nrf_qspi_prot_conf_t p_config)
	Function for setting the QSPI IFCONFIG0 register. More...

__STATIC_INLINE void	nrf_qspi_ifconfig1_set (NRF_QSPI_Type p_reg, const nrf_qspi_phy_conf_t p_config)
	Function for setting the QSPI IFCONFIG1 register. More...

__STATIC_INLINE void	nrf_qspi_addrconfig_set (NRF_QSPI_Type p_reg, const nrf_qspi_addrconfig_conf_t p_config)
	Function for setting the QSPI ADDRCONF register. More...

__STATIC_INLINE void	nrf_qspi_write_buffer_set (NRF_QSPI_Type p_reg, void const p_buffer, uint32_t length, uint32_t dest_addr)
	Function for setting write data into the peripheral register (without starting the process). More...

__STATIC_INLINE void	nrf_qspi_read_buffer_set (NRF_QSPI_Type p_reg, void p_buffer, uint32_t length, uint32_t src_addr)
	Function for setting read data into the peripheral register (without starting the process). More...

__STATIC_INLINE void	nrf_qspi_erase_ptr_set (NRF_QSPI_Type *p_reg, uint32_t erase_addr, nrf_qspi_erase_len_t len)
	Function for setting erase data into the peripheral register (without starting the process). More...

__STATIC_INLINE uint32_t	nrf_qspi_status_reg_get (NRF_QSPI_Type const *p_reg)
	Function for getting the peripheral status register. More...

__STATIC_INLINE uint8_t	nrf_qspi_sreg_get (NRF_QSPI_Type const *p_reg)
	Function for getting the device status register stored in the peripheral status register. More...

__STATIC_INLINE bool	nrf_qspi_busy_check (NRF_QSPI_Type const *p_reg)
	Function for checking if the peripheral is busy or not. More...

__STATIC_INLINE void	nrf_qspi_cinstrdata_set (NRF_QSPI_Type p_reg, nrf_qspi_cinstr_len_t length, void const p_tx_data)
	Function for setting registers sending with custom instruction transmission. More...

__STATIC_INLINE void	nrf_qspi_cinstrdata_get (NRF_QSPI_Type const p_reg, nrf_qspi_cinstr_len_t length, void p_rx_data)
	Function for getting data from register after custom instruction transmission. More...

__STATIC_INLINE void	nrf_qspi_cinstr_transfer_start (NRF_QSPI_Type p_reg, const nrf_qspi_cinstr_conf_t p_config)
	Function for sending custom instruction to external memory. More...

Detailed Description

Hardware access layer for accessing the QSPI peripheral.

Enumeration Type Documentation

enum nrf_qspi_addrconfig_mode_t

Addressing configuration mode.

Enumerator
NRF_QSPI_ADDRCONF_MODE_NOINSTR	Do not send any instruction.
NRF_QSPI_ADDRCONF_MODE_OPCODE	Send opcode.
NRF_QSPI_ADDRCONF_MODE_OPBYTE0	Send opcode, byte0.
NRF_QSPI_ADDRCONF_MODE_ALL	Send opcode, byte0, byte1.

enum nrf_qspi_addrmode_t

Interface configuration for addressing mode.

Enumerator
NRF_QSPI_ADDRMODE_24BIT	24-bit addressing.
NRF_QSPI_ADDRMODE_32BIT	32-bit addressing.

enum nrf_qspi_cinstr_len_t

Custom instruction length.

Enumerator
NRF_QSPI_CINSTR_LEN_1B	Send opcode only.
NRF_QSPI_CINSTR_LEN_2B	Send opcode, CINSTRDAT0.BYTE0.
NRF_QSPI_CINSTR_LEN_3B	Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE1.
NRF_QSPI_CINSTR_LEN_4B	Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE2.
NRF_QSPI_CINSTR_LEN_5B	Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE3.
NRF_QSPI_CINSTR_LEN_6B	Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE4.
NRF_QSPI_CINSTR_LEN_7B	Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE5.
NRF_QSPI_CINSTR_LEN_8B	Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE6.
NRF_QSPI_CINSTR_LEN_9B	Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7.

enum nrf_qspi_erase_len_t

Erasing data length.

Enumerator
NRF_QSPI_ERASE_LEN_4KB	Erase 4 kB block (flash command 0x20).
NRF_QSPI_ERASE_LEN_64KB	Erase 64 kB block (flash command 0xD8).
NRF_QSPI_ERASE_LEN_ALL	Erase all (flash command 0xC7).

enum nrf_qspi_event_t

QSPI events.

Enumerator
NRF_QSPI_EVENT_READY	QSPI peripheral is ready after it executes any task.

enum nrf_qspi_frequency_t

QSPI frequency divider values.

Enumerator
NRF_QSPI_FREQ_32MDIV1	32.0 MHz.
NRF_QSPI_FREQ_32MDIV2	16.0 MHz.
NRF_QSPI_FREQ_32MDIV3	10.6 MHz.
NRF_QSPI_FREQ_32MDIV4	8.00 MHz.
NRF_QSPI_FREQ_32MDIV5	6.40 MHz.
NRF_QSPI_FREQ_32MDIV6	5.33 MHz.
NRF_QSPI_FREQ_32MDIV7	4.57 MHz.
NRF_QSPI_FREQ_32MDIV8	4.00 MHz.
NRF_QSPI_FREQ_32MDIV9	3.55 MHz.
NRF_QSPI_FREQ_32MDIV10	3.20 MHz.
NRF_QSPI_FREQ_32MDIV11	2.90 MHz.
NRF_QSPI_FREQ_32MDIV12	2.66 MHz.
NRF_QSPI_FREQ_32MDIV13	2.46 MHz.
NRF_QSPI_FREQ_32MDIV14	2.29 MHz.
NRF_QSPI_FREQ_32MDIV15	2.13 MHz.
NRF_QSPI_FREQ_32MDIV16	2.00 MHz.

enum nrf_qspi_int_mask_t

QSPI interrupts.

Enumerator
NRF_QSPI_INT_READY_MASK	Interrupt on READY event.

enum nrf_qspi_readoc_t

Interface configuration for a read operation.

Enumerator
NRF_QSPI_READOC_FASTREAD	Single data line SPI. FAST_READ (opcode 0x0B).
NRF_QSPI_READOC_READ2O	Dual data line SPI. READ2O (opcode 0x3B).
NRF_QSPI_READOC_READ2IO	Dual data line SPI. READ2IO (opcode 0xBB).
NRF_QSPI_READOC_READ4O	Quad data line SPI. READ4O (opcode 0x6B).
NRF_QSPI_READOC_READ4IO	Quad data line SPI. READ4IO (opcode 0xEB).

enum nrf_qspi_spi_mode_t

QSPI SPI mode. Polarization and phase configuration.

Enumerator
NRF_QSPI_MODE_0	Mode 0 (CPOL=0, CPHA=0).
NRF_QSPI_MODE_1	Mode 1 (CPOL=1, CPHA=1).

enum nrf_qspi_task_t

QSPI tasks.

Enumerator
NRF_QSPI_TASK_ACTIVATE	Activate the QSPI interface.
NRF_QSPI_TASK_READSTART	Start transfer from external flash memory to internal RAM.
NRF_QSPI_TASK_WRITESTART	Start transfer from internal RAM to external flash memory.
NRF_QSPI_TASK_ERASESTART	Start external flash memory erase operation.

enum nrf_qspi_writeoc_t

Interface configuration for a write operation.

Enumerator
NRF_QSPI_WRITEOC_PP	Single data line SPI. PP (opcode 0x02).
NRF_QSPI_WRITEOC_PP2O	Dual data line SPI. PP2O (opcode 0xA2).
NRF_QSPI_WRITEOC_PP4O	Quad data line SPI. PP4O (opcode 0x32).
NRF_QSPI_WRITEOC_PP4IO	Quad data line SPI. READ4O (opcode 0x38).

Function Documentation

__STATIC_INLINE void nrf_qspi_addrconfig_set	(	NRF_QSPI_Type *	p_reg ,
		const nrf_qspi_addrconfig_conf_t *	p_config
	)

Function for setting the QSPI ADDRCONF register.

Function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure is sent during the start of the peripheral. Remember that the reset instruction can set addressing mode to default in the memory device. If memory reset is necessary before configuring the addressing mode, use custom instruction feature instead of this function. Case with reset: Enable the peripheral without setting ADDRCONF register, send reset instructions using a custom instruction feature (reset enable and then reset), set proper addressing mode using the custom instruction feature.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	p_config	Pointer to the addressing mode configuration structure. See nrf_qspi_addrconfig_conf_t .

__STATIC_INLINE bool nrf_qspi_busy_check ( NRF_QSPI_Type const * p_reg )

Function for checking if the peripheral is busy or not.

Parameters

[in] p_reg Pointer to the peripheral register structure.

Return values

true	If QSPI is busy.
false	If QSPI is ready.

__STATIC_INLINE void nrf_qspi_cinstr_transfer_start	(	NRF_QSPI_Type *	p_reg ,
		const nrf_qspi_cinstr_conf_t *	p_config
	)

Function for sending custom instruction to external memory.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	p_config	Pointer to the custom instruction configuration structure. See nrf_qspi_cinstr_conf_t .

__STATIC_INLINE void nrf_qspi_cinstrdata_get	(	NRF_QSPI_Type const *	p_reg ,
		nrf_qspi_cinstr_len_t	length ,
		void *	p_rx_data
	)

Function for getting data from register after custom instruction transmission.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	length	Length of the custom instruction data.
[in]	p_rx_data	Pointer to the reading buffer.

__STATIC_INLINE void nrf_qspi_cinstrdata_set	(	NRF_QSPI_Type *	p_reg ,
		nrf_qspi_cinstr_len_t	length ,
		void const *	p_tx_data
	)

Function for setting registers sending with custom instruction transmission.

This function can be ommited when using NRF_QSPI_CINSTR_LEN_1B as the length argument (sending only opcode without data).

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	length	Length of the custom instruction data.
[in]	p_tx_data	Pointer to the data to send with the custom instruction.

__STATIC_INLINE void nrf_qspi_disable ( NRF_QSPI_Type * p_reg )

Function for disabling the QSPI peripheral.

Parameters

[in] p_reg Pointer to the peripheral register structure.

__STATIC_INLINE void nrf_qspi_enable ( NRF_QSPI_Type * p_reg )

Function for enabling the QSPI peripheral.

Parameters

[in] p_reg Pointer to the peripheral register structure.

__STATIC_INLINE void nrf_qspi_erase_ptr_set	(	NRF_QSPI_Type *	p_reg ,
		uint32_t	erase_addr ,
		nrf_qspi_erase_len_t	len
	)

Function for setting erase data into the peripheral register (without starting the process).

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	erase_addr	Start address to erase. Address must have padding set to 4 bytes.
[in]	len	Size of erasing area.

__STATIC_INLINE uint32_t* nrf_qspi_event_address_get	(	NRF_QSPI_Type const *	p_reg ,
		nrf_qspi_event_t	qspi_event
	)

Function for getting the address of a specific QSPI event register.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	qspi_event	Requested event.

Returns: Address of the specified event register.

__STATIC_INLINE bool nrf_qspi_event_check	(	NRF_QSPI_Type const *	p_reg ,
		nrf_qspi_event_t	qspi_event
	)

Function for checking the state of a specific SPI event.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	qspi_event	Event to check.

Return values

true	If the event is set.
false	If the event is not set.

__STATIC_INLINE void nrf_qspi_event_clear	(	NRF_QSPI_Type *	p_reg ,
		nrf_qspi_event_t	qspi_event
	)

Function for clearing a specific QSPI event.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	qspi_event	Event to clear.

__STATIC_INLINE void nrf_qspi_ifconfig0_set	(	NRF_QSPI_Type *	p_reg ,
		const nrf_qspi_prot_conf_t *	p_config
	)

Function for setting the QSPI IFCONFIG0 register.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	p_config	Pointer to the QSPI protocol interface configuration structure. See nrf_qspi_prot_conf_t .

__STATIC_INLINE void nrf_qspi_ifconfig1_set	(	NRF_QSPI_Type *	p_reg ,
		const nrf_qspi_phy_conf_t *	p_config
	)

Function for setting the QSPI IFCONFIG1 register.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	p_config	Pointer to the QSPI physical interface configuration structure. See nrf_qspi_phy_conf_t .

__STATIC_INLINE void nrf_qspi_int_disable	(	NRF_QSPI_Type *	p_reg ,
		uint32_t	qspi_int_mask
	)

Function for disabling specified interrupts.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	qspi_int_mask	Interrupts to disable.

__STATIC_INLINE void nrf_qspi_int_enable	(	NRF_QSPI_Type *	p_reg ,
		uint32_t	qspi_int_mask
	)

Function for enabling specified interrupts.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	qspi_int_mask	Interrupts to enable.

__STATIC_INLINE bool nrf_qspi_int_enable_check	(	NRF_QSPI_Type const *	p_reg ,
		nrf_qspi_int_mask_t	qspi_int
	)

Function for retrieving the state of a given interrupt.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	qspi_int	Interrupt to check.

Return values

true	If the interrupt is enabled.
false	If the interrupt is not enabled.

__STATIC_INLINE void nrf_qspi_pins_set	(	NRF_QSPI_Type *	p_reg ,
		const nrf_qspi_pins_t *	p_pins
	)

Function for configuring QSPI pins.

If a given signal is not needed, pass the NRF_QSPI_PIN_NOT_CONNECTED value instead of its pin number.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	p_pins	Pointer to the pins configuration structure. See nrf_qspi_pins_t .

__STATIC_INLINE void nrf_qspi_read_buffer_set	(	NRF_QSPI_Type *	p_reg ,
		void *	p_buffer ,
		uint32_t	length ,
		uint32_t	src_addr
	)

Function for setting read data into the peripheral register (without starting the process).

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[out]	p_buffer	Pointer to the reading buffer.
[in]	length	Length of the read data.
[in]	src_addr	Address in memory to read from.

__STATIC_INLINE uint8_t nrf_qspi_sreg_get ( NRF_QSPI_Type const * p_reg )

Function for getting the device status register stored in the peripheral status register.

Parameters

[in] p_reg Pointer to the peripheral register structure.

Returns: Device status register (lower byte).

__STATIC_INLINE uint32_t nrf_qspi_status_reg_get ( NRF_QSPI_Type const * p_reg )

Function for getting the peripheral status register.

Parameters

[in] p_reg Pointer to the peripheral register structure.

Returns: Peripheral status register.

__STATIC_INLINE uint32_t nrf_qspi_task_address_get	(	NRF_QSPI_Type const *	p_reg ,
		nrf_qspi_task_t	task
	)

Function for getting the address of a specific QSPI task register.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	task	Requested task.

Returns: Address of the specified task register.

__STATIC_INLINE void nrf_qspi_task_trigger	(	NRF_QSPI_Type *	p_reg ,
		nrf_qspi_task_t	task
	)

Function for activating a specific QSPI task.

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	task	Task to activate.

__STATIC_INLINE void nrf_qspi_write_buffer_set	(	NRF_QSPI_Type *	p_reg ,
		void const *	p_buffer ,
		uint32_t	length ,
		uint32_t	dest_addr
	)

Function for setting write data into the peripheral register (without starting the process).

Parameters

[in]	p_reg	Pointer to the peripheral register structure.
[in]	p_buffer	Pointer to the writing buffer.
[in]	length	Lenght of the writing data.
[in]	dest_addr	Address in memory to write to.

QSPI HAL

nRF5 SDK v13.1.0

Data Structures

Macros

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

Function Documentation