This anomaly applies to Revision 1, build codes LACA-A0A.
It was inherited from the previous IC revision Engineering A.
Symptoms
The CPU skips first instruction after instruction cache is disabled.
Conditions
The code executes instructions to disable the instruction cache.
Consequences
The program does not execute as expected.
Workaround
Use the following function to disable instruction cache:
_attribute_((aligned(ICACHE_LINE_SIZE)))
void icache_disable(void) {
int key = DisableInterrupts();
__ISB();
NRF_NVMC->ICACHECNF = 0;
__ISB();
EnableInterrupts(key);
}