This anomaly applies to Revision 1, build codes LACA-A0A.
It was inherited from the previous IC revision Engineering A.
Symptoms
The CPU gets stalled when executing code from RAM.
Conditions
Executing code from RAM while the NVMC is performing flash erase operation.
Consequences
The CPU is halted for the time it takes the NVMC to perform the erase in flash. See the NVMC electrical specification for time details.
Workaround
None.