nRF9160 Engineering A Errata

nRF9160 Engineering A Errata
Change log
New and inherited anomalies
[1] I2S: Excessive power consumption after using STOP task
[2] NVMC: CPU code execution from RAM halted during flash page erase operation
[4] GPIO: Bits in GPIO LATCH register are incorrectly set to 1
[6] POWER: SLEEPENTER and SLEEPEXIT events asserted after pin reset
[7] KMU: Subsequent accesses between info_mem and main_mem of the flash may not work properly
[8] SAADC: Reduced SFDR
[10] LTE Modem: MAGPIO and MIPI RFFE - high initial voltage
[12] Debug and Trace: SWD debugger scan
[14] REGULATORS: Supply regulators default to LDO mode after reset
[16] SAADC: SAADC result
[17] Debug and Trace: LTE modem stops when debugging through SWD interface
[20] RAM: RAM content cannot be trusted upon waking up from System ON IDLE or System OFF mode
[21] NVMC: Disabling instruction cache causes skip of next instruction
[23] UART: TASKS_RESUME impacts UARTE
[24] NVMC: CPU is not halted for page erase in debug session
[26] CLOCK, LFXO: System locks up when set in System ON IDLE while waiting for EVENTS_LFCLKSTARTED
[28] SAADC: Events are not generated when switching from scan mode to no-scan mode
[29] Debug and Trace: System reset does not work
[30] PWM: False SEQEND[0] and SEQEND[1] events are generated
[31] LFXO: LFXO startup fails
[32] Debug and Trace: Debug power-up request is not acknowledged
[33] DPPI: Non-secure code can detect secure events

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