nRF5340 Engineering D Errata

nRF5340 Engineering D Errata
Revision history
New and inherited anomalies
[6] NVMC: Disabling instruction cache causes skip of next instruction
[43] QSPI: Reading QSPI registers after XIP might halt application CPU
[44] UARTE: TASKS_RESUME impacts UARTE
[47] TWIM: I2C timing spec is violated at 400 kHz
[55] RESET: Bits in RESETREAS are set when they should not be
[65] SAADC: Events are not generated when switching from scan mode to no-scan mode with BURST disabled
[70] NFCT: Event FIELDDETECTED may be generated too early
[71] NFCT: Frame delay timing is too short after SLP_REQ
[75] PWM: False SEQEND[0] and SEQEND[1] events are generated
[76] DPPI: Non-secure code can detect secure events
[87] RADIO: RSSI parameter adjustment
[99] QSPI: Mode 3 is not functional at 96 MHz
[112] I2S: 24-bit sample in a 32-bit half-frame is received incorrectly
[113] RADIO: Reading DTX in MODECNF0 gives incorrect value
[117] RADIO: Changing MODE requires additional configuration
[119] GPIO: Writes to LATCH register take several CPU cycles to take effect
[121] QSPI: Configuration of peripheral requires additional steps
[122] CTRL-AP: Successive triggering of CTRLAP.ERASEALL has no effect
Fixed anomalies

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