This anomaly applies to Revision 3, build codes QFAA-Gx0, QFAB-Gx0, CIAA-Gx0.
It was inherited from the previous SoC revision Revision 2.
Symptoms
RAM[x].POWERSET and RAM[x].POWERCLR read as zero, even though the RAM is on.
Conditions
Always.
Consequences
Not possible to read the RAM state using RAM[x].POWERSET and RAM[x].POWERCLR registers. Write works as it should.
Workaround
Use RAM[x].POWER to read the state of the RAM.